dunedaq::timing::MasterDesignInterface Class Reference

Base class for timing master designs. More...

#include <MasterDesignInterface.hpp>

Inheritance diagram for dunedaq::timing::MasterDesignInterface:

Collaboration diagram for dunedaq::timing::MasterDesignInterface:

Public Member Functions
	MasterDesignInterface (const uhal::Node &node)
virtual	~MasterDesignInterface ()
virtual uint64_t	read_master_timestamp () const =0
	Read the current timestamp.
virtual void	sync_timestamp (TimestampSource source) const =0
	Sync timestamp to current machine value.
virtual uint32_t	measure_endpoint_rtt (uint32_t address, bool control_sfp=true, int sfp_mux=-1) const =0
	Measure the endpoint round trip time.
virtual void	apply_endpoint_delay (uint32_t address, uint32_t coarse_delay, uint32_t fine_delay, uint32_t phase_delay, bool measure_rtt=false, bool control_sfp=true, int sfp_mux=-1) const =0
	Apply delay to endpoint.
virtual void	enable_periodic_fl_cmd (uint32_t channel, double rate, bool poisson=false) const =0
	Configure fake trigger generator.
virtual void	enable_periodic_fl_cmd (uint32_t command, uint32_t channel, double rate, bool poisson=false) const =0
	Configure fake trigger generator.
virtual const MasterNodeInterface *	get_master_node_plain () const =0
	Get master node pointer.
template<class MST >
const MST *	get_master_node () const
virtual void	configure (ClockSource clock_source, TimestampSource ts_source) const =0
	Prepare the timing device for data taking.
virtual void	get_info (timingfirmwareinfo::MasterMonitorData &mon_data) const =0
	Give info to collector.
virtual void	get_info (timingfirmwareinfo::TimingDeviceInfo &mon_data) const=0
	Give info to collector.
Public Member Functions inherited from dunedaq::timing::TopDesignInterface
	TopDesignInterface (const uhal::Node &node)
virtual	~TopDesignInterface ()
virtual const IONode *	get_io_node_plain () const =0
	Get io node pointer.
template<class IO >
const IO *	get_io_node () const
virtual void	soft_reset_io () const =0
	Reset timing node.
virtual void	reset_io (const std::string &clock_config_file) const =0
	Reset timing node.
virtual void	reset_io (const ClockSource &clock_source) const =0
	Reset timing node.
virtual std::string	get_hardware_info (bool print_out=false) const =0
	Print hardware information.
virtual uint32_t	read_firmware_version () const =0
	Read firmware version.
virtual void	validate_firmware_version () const =0
	Validate firmware version.
Public Member Functions inherited from dunedaq::timing::TimingNode
	TimingNode (const uhal::Node &node)
virtual	~TimingNode ()
virtual std::string	get_status (bool print_out=false) const =0
	Get the status string of the timing node. Optionally print it.
std::map< std::string, uhal::ValWord< uint32_t > >	read_sub_nodes (const uhal::Node &node, bool dispatch=true) const
	Read subnodes.
void	reset_sub_nodes (const uhal::Node &node, uint32_t aValue=0x0, bool dispatch=true) const
	Reset subnodes.

Private Member Functions
virtual void	configure (ClockSource clock_source) const=0
	Prepare the timing device for data taking.

Detailed Description

Base class for timing master designs.

Definition at line 34 of file MasterDesignInterface.hpp.

Constructor & Destructor Documentation

MasterDesignInterface()

dunedaq::timing::MasterDesignInterface::MasterDesignInterface ( const uhal::Node & node )

inlineexplicit

Definition at line 38 of file MasterDesignInterface.hpp.

  : TopDesignInterface(node)
    {}

~MasterDesignInterface()

virtual dunedaq::timing::MasterDesignInterface::~MasterDesignInterface ( )

inlinevirtual

Definition at line 41 of file MasterDesignInterface.hpp.

{}

Member Function Documentation

apply_endpoint_delay()

virtual void dunedaq::timing::MasterDesignInterface::apply_endpoint_delay ( uint32_t address, uint32_t coarse_delay, uint32_t fine_delay, uint32_t phase_delay, bool measure_rtt = false, bool control_sfp = true, int sfp_mux = -1 ) const

pure virtual

Apply delay to endpoint.

Implemented in dunedaq::timing::MasterDesign, and dunedaq::timing::MasterMuxDesign.

configure() [1/2]

virtual void dunedaq::timing::TopDesignInterface::configure ( ClockSource clock_source ) const

privatevirtual

Prepare the timing device for data taking.

Implements dunedaq::timing::TopDesignInterface.

configure() [2/2]

virtual void dunedaq::timing::MasterDesignInterface::configure ( ClockSource clock_source, TimestampSource ts_source ) const

pure virtual

Prepare the timing device for data taking.

Implemented in dunedaq::timing::BoreasDesign, dunedaq::timing::KerberosDesign, dunedaq::timing::MasterDesign, and dunedaq::timing::OuroborosDesign.

enable_periodic_fl_cmd() [1/2]

virtual void dunedaq::timing::MasterDesignInterface::enable_periodic_fl_cmd ( uint32_t channel, double rate, bool poisson = false ) const

pure virtual

Configure fake trigger generator.

Implemented in dunedaq::timing::MasterDesign.

enable_periodic_fl_cmd() [2/2]

virtual void dunedaq::timing::MasterDesignInterface::enable_periodic_fl_cmd ( uint32_t command, uint32_t channel, double rate, bool poisson = false ) const

pure virtual

Configure fake trigger generator.

Implemented in dunedaq::timing::MasterDesign.

get_info() [1/2]

virtual void dunedaq::timing::MasterDesignInterface::get_info ( timingfirmwareinfo::MasterMonitorData & mon_data ) const

pure virtual

Give info to collector.

Implemented in dunedaq::timing::MasterDesign.

get_info() [2/2]

virtual void dunedaq::timing::TopDesignInterface::get_info ( timingfirmwareinfo::TimingDeviceInfo & mon_data ) const

virtual

Give info to collector.

Implements dunedaq::timing::TopDesignInterface.

get_master_node()

template<class MST >

const MST * dunedaq::timing::MasterDesignInterface::get_master_node ( ) const

inline

Definition at line 90 of file MasterDesignInterface.hpp.

  { 
    return dynamic_cast<const MST*>(get_master_node_plain()); 
  }

get_master_node_plain()

virtual const MasterNodeInterface * dunedaq::timing::MasterDesignInterface::get_master_node_plain ( ) const

pure virtual

Get master node pointer.

Implemented in dunedaq::timing::MasterDesign.

measure_endpoint_rtt()

virtual uint32_t dunedaq::timing::MasterDesignInterface::measure_endpoint_rtt ( uint32_t address, bool control_sfp = true, int sfp_mux = -1 ) const

pure virtual

Measure the endpoint round trip time.

Returns

{ description_of_the_return_value }

Implemented in dunedaq::timing::MasterDesign, and dunedaq::timing::MasterMuxDesign.

read_master_timestamp()

virtual uint64_t dunedaq::timing::MasterDesignInterface::read_master_timestamp ( ) const

pure virtual

Read the current timestamp.

Returns

{ description_of_the_return_value }

Implemented in dunedaq::timing::MasterDesign.

sync_timestamp()

virtual void dunedaq::timing::MasterDesignInterface::sync_timestamp ( TimestampSource source ) const

pure virtual

Sync timestamp to current machine value.

Implemented in dunedaq::timing::MasterDesign.

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The documentation for this class was generated from the following file:

• /github/workspace/dunedaq/sourcecode/timing/include/timing/MasterDesignInterface.hpp