MasterDesignInterface.hpp

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#ifndef TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_
#define TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_
 
// PDT Headers
#include "timing/TopDesign.hpp"
#include "timing/MasterNodeInterface.hpp"
#include "timing/definitions.hpp"
 
// uHal Headers
#include "uhal/DerivedNode.hpp"
 
// C++ Headers
#include <chrono>
#include <sstream>
#include <string>
 
namespace dunedaq {
namespace timing {

class MasterDesignInterface : virtual public TopDesignInterface
{
 
public:
  explicit MasterDesignInterface(const uhal::Node& node)
  : TopDesignInterface(node)
    {}
  virtual ~MasterDesignInterface() {}

  virtual uint64_t read_master_timestamp() const = 0; // NOLINT(build/unsigned)

  virtual void sync_timestamp(TimestampSource source) const = 0;
  
  virtual uint32_t measure_endpoint_rtt(uint32_t address, // NOLINT(build/unsigned)
                                        bool control_sfp = true,
                                        int sfp_mux = -1) const = 0;
  virtual void apply_endpoint_delay(uint32_t address,      // NOLINT(build/unsigned)
                                    uint32_t coarse_delay, // NOLINT(build/unsigned)
                                    uint32_t fine_delay,   // NOLINT(build/unsigned)
                                    uint32_t phase_delay,  // NOLINT(build/unsigned)
                                    bool measure_rtt = false,
                                    bool control_sfp = true,
                                    int sfp_mux = -1) const = 0;
  virtual void enable_periodic_fl_cmd(uint32_t channel, double rate, bool poisson = false) const = 0; // NOLINT(build/unsigned)

  virtual void enable_periodic_fl_cmd(uint32_t command, uint32_t channel, double rate, bool poisson = false) const = 0; // NOLINT(build/unsigned)

  virtual const MasterNodeInterface* get_master_node_plain() const = 0;
 
  template<class MST>
  const MST* get_master_node() const
  { 
    return dynamic_cast<const MST*>(get_master_node_plain()); 
  }

  virtual void configure(ClockSource clock_source, TimestampSource ts_source) const = 0;

  virtual void get_info(timingfirmwareinfo::MasterMonitorData& mon_data) const = 0;
 
  using TopDesignInterface::get_info;
 
private:
  using TopDesignInterface::configure;
 
};
 
} // namespace timing
} // namespace dunedaq
 
#endif // TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_