DUNE-DAQ
DUNE Trigger and Data Acquisition software
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MasterDesignInterface.hpp
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1
12#ifndef TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_
13#define TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_
14
15// PDT Headers
16#include "timing/TopDesign.hpp"
19
20// uHal Headers
21#include "uhal/DerivedNode.hpp"
22
23// C++ Headers
24#include <chrono>
25#include <sstream>
26#include <string>
27
28namespace dunedaq {
29namespace timing {
30
35{
36
37public:
38 explicit MasterDesignInterface(const uhal::Node& node)
39 : TopDesignInterface(node)
40 {}
42
48 virtual uint64_t read_master_timestamp() const = 0; // NOLINT(build/unsigned)
49
54 virtual void sync_timestamp(TimestampSource source) const = 0;
55
61 virtual uint32_t measure_endpoint_rtt(uint32_t address, // NOLINT(build/unsigned)
62 bool control_sfp = true,
63 int sfp_mux = -1) const = 0;
67 virtual void apply_endpoint_delay(uint32_t address, // NOLINT(build/unsigned)
68 uint32_t coarse_delay, // NOLINT(build/unsigned)
69 uint32_t fine_delay, // NOLINT(build/unsigned)
70 uint32_t phase_delay, // NOLINT(build/unsigned)
71 bool measure_rtt = false,
72 bool control_sfp = true,
73 int sfp_mux = -1) const = 0;
77 virtual void enable_periodic_fl_cmd(uint32_t channel, double rate, bool poisson = false) const = 0; // NOLINT(build/unsigned)
78
82 virtual void enable_periodic_fl_cmd(uint32_t command, uint32_t channel, double rate, bool poisson = false) const = 0; // NOLINT(build/unsigned)
83
87 virtual const MasterNodeInterface* get_master_node_plain() const = 0;
88
89 template<class MST>
90 const MST* get_master_node() const
91 {
92 return dynamic_cast<const MST*>(get_master_node_plain());
93 }
94
99 virtual void configure(ClockSource clock_source, TimestampSource ts_source) const = 0;
100
104 virtual void get_info(timingfirmwareinfo::MasterMonitorData& mon_data) const = 0;
105
107
108private:
110
111};
112
113} // namespace timing
114} // namespace dunedaq
115
116#endif // TIMING_INCLUDE_TIMING_MASTERDESIGNINTERFACE_HPP_
Base class for timing master designs.
virtual void get_info(timingfirmwareinfo::MasterMonitorData &mon_data) const =0
Give info to collector.
virtual void sync_timestamp(TimestampSource source) const =0
Sync timestamp to current machine value.
virtual uint32_t measure_endpoint_rtt(uint32_t address, bool control_sfp=true, int sfp_mux=-1) const =0
Measure the endpoint round trip time.
virtual void configure(ClockSource clock_source, TimestampSource ts_source) const =0
Prepare the timing device for data taking.
virtual void enable_periodic_fl_cmd(uint32_t command, uint32_t channel, double rate, bool poisson=false) const =0
Configure fake trigger generator.
virtual const MasterNodeInterface * get_master_node_plain() const =0
Get master node pointer.
virtual void enable_periodic_fl_cmd(uint32_t channel, double rate, bool poisson=false) const =0
Configure fake trigger generator.
virtual void apply_endpoint_delay(uint32_t address, uint32_t coarse_delay, uint32_t fine_delay, uint32_t phase_delay, bool measure_rtt=false, bool control_sfp=true, int sfp_mux=-1) const =0
Apply delay to endpoint.
virtual uint64_t read_master_timestamp() const =0
Read the current timestamp.
Base class for timing IO nodes.
Base class for timing top design nodes.
virtual void configure(ClockSource clock_source) const =0
Prepare the timing device for data taking.
virtual void get_info(timingfirmwareinfo::TimingDeviceInfo &mon_data) const =0
Give info to collector.
Including Qt Headers.