8UHAL_REGISTER_DERIVED_NODE(MasterDesign)
27 std::stringstream status;
32 TLOG() << status.str();
75 uint32_t coarse_delay,
90 auto dts_clock_frequency = this->get_io_node_plain()->read_firmware_frequency();
91 get_master_node_plain()->enable_periodic_fl_cmd(channel, rate, poisson, dts_clock_frequency);
99 auto dts_clock_frequency = this->get_io_node_plain()->read_firmware_frequency();
100 get_master_node_plain()->enable_periodic_fl_cmd(command, channel, rate, poisson, dts_clock_frequency);
109 uhal::Node::getClient().dispatch();
111 return firmware_version.value();
121 uint32_t major_firmware_version = (firmware_version >> 16) & 0xff;
122 uint32_t minor_firmware_version = (firmware_version >> 8) & 0xff;
123 uint32_t patch_firmware_version = (firmware_version >> 0) & 0xff;
virtual std::string get_pll_status(bool print_out=false) const
Print status of on-board PLL.
Base class for timing master designs.
Base class for timing master designs.
void get_info(timingfirmwareinfo::TimingDeviceInfo &mon_data) const override
Give info to collector.
std::string get_status(bool print_out=false) const override
Get status string, optionally print.
const MasterNodeInterface * get_master_node_plain() const override
Get master node pointer.
void apply_endpoint_delay(uint32_t address, uint32_t coarse_delay, uint32_t fine_delay, uint32_t phase_delay, bool measure_rtt=false, bool control_sfp=true, int sfp_mux=-1) const override
Apply delay to endpoint.
uint32_t measure_endpoint_rtt(uint32_t address, bool control_sfp=true, int sfp_mux=-1) const override
Measure the endpoint round trip time.
void sync_timestamp(TimestampSource source) const override
Sync timestamp to current machine value.
void validate_firmware_version() const override
Validate master firmware version.
void enable_periodic_fl_cmd(uint32_t channel, double rate, bool poisson=false) const override
Configure fake trigger generator.
uint32_t read_firmware_version() const override
Read master firmware version.
void configure(ClockSource clock_source, TimestampSource ts_source) const override
Prepare the timing master for data taking.
uint64_t read_master_timestamp() const override
Read the current timestamp.
virtual void apply_endpoint_delay(uint32_t address, uint32_t coarse_delay, uint32_t fine_delay, uint32_t phase_delay, bool measure_rtt=false, bool control_sfp=true) const =0
Apply delay to endpoint.
virtual uint32_t measure_endpoint_rtt(uint32_t address, bool control_sfp=true) const =0
Measure the endpoint round trip time.
virtual uint64_t read_timestamp() const =0
Read the current timestamp word.
virtual void sync_timestamp(TimestampSource source) const =0
Set timestamp, enable transmission.
virtual std::string get_status(bool print_out=false) const =0
Get the status string of the timing node. Optionally print it.
Base class for timing top design nodes.
Base class for timing top design nodes with IO class.
void configure(ClockSource clock_source) const override
Prepare the timing device for data taking.
void get_info(timingfirmwareinfo::TimingDeviceInfo &mon_data) const override
Give info to collector.
const IONode * get_io_node_plain() const override
Get io node pointer.
void warning(const Issue &issue)
void error(const Issue &issue)
MasterMonitorData master_info