26 std::string uid_i2c_bus,
27 std::string pll_i2c_bus,
28 std::string pll_i2c_device,
29 std::vector<std::string> clock_names,
30 std::vector<std::string> sfp_i2c_buses)
32 , m_uid_i2c_bus(uid_i2c_bus)
33 , m_pll_i2c_bus(pll_i2c_bus)
34 , m_pll_i2c_device(pll_i2c_device)
35 , m_clock_names(clock_names)
36 , m_sfp_i2c_buses(sfp_i2c_buses)
50 uhal::ValWord<uint32_t> board_type = getNode(
"config.board_type").read();
51 getClient().dispatch();
52 return board_type.value();
60 uhal::ValWord<uint32_t> carrier_type = getNode(
"config.carrier_type").read();
61 getClient().dispatch();
62 return carrier_type.value();
70 uhal::ValWord<uint32_t> design_type = getNode(
"config.design_type").read();
71 getClient().dispatch();
72 return design_type.value();
80 uhal::ValWord<uint32_t> firmware_frequency = getNode(
"config.clock_frequency").read();
81 getClient().dispatch();
82 return firmware_frequency.value();
92 std::vector<uint8_t> uid_values =
95 for (uint8_t i = 0; i < uid_values.size(); ++i) {
96 uid = (uid << 8) | uid_values.at(i);
109 }
catch (
const std::out_of_range& e) {
120 std::stringstream info;
127 std::vector<std::pair<std::string, std::string>> hardware_info;
130 hardware_info.push_back(std::make_pair(
"Board type",
get_board_type_map().at(board_type)));
131 }
catch (
const std::out_of_range& e) {
137 }
catch (
const std::out_of_range& e) {
144 hardware_info.push_back(std::make_pair(
"Carrier type",
get_carrier_type_map().at(carrier_type)));
145 }
catch (
const std::out_of_range& e) {
150 hardware_info.push_back(std::make_pair(
"Design type",
get_design_type_map().at(design_type)));
151 }
catch (
const std::out_of_range& e) {
155 hardware_info.push_back(std::make_pair(
"Firmware frequency [MHz]", std::to_string(firmware_frequency)));
160 TLOG() << info.str();
169 std::string config_file;
170 std::stringstream clock_config_key;
180 }
catch (
const std::out_of_range& e) {
185 if (carrier_type == kCarrierEnclustraA35) {
187 getNode<I2CMasterNode>(
m_uid_i2c_bus).get_slave(
"AX3_Switch").write_i2c(0x01, 0x7f);
188 }
catch (
const std::exception& e) {
194 auto pll_model = pll->read_device_version();
195 clock_config_key << std::hex << pll_model;
205 }
catch (
const std::out_of_range& e) {
211 TLOG_DEBUG(0) <<
"Using pll config key: " << clock_config_key.str();
215 }
catch (
const std::out_of_range& e) {
216 throw ClockConfigNotFound(
ERS_HERE, clock_config_key.str(), e);
219 TLOG_DEBUG(0) <<
"PLL config file: " << config_file <<
" from key: " << clock_config_key.str();
221 const char* env_var_char = std::getenv(
"TIMING_SHARE");
223 if (env_var_char ==
nullptr) {
224 throw EnvironmentVariableNotSet(
ERS_HERE,
"TIMING_SHARE");
227 std::string env_var(env_var_char);
229 std::string full_pll_config_file_path = env_var +
"/config/etc/clock/" + config_file;
231 TLOG_DEBUG(0) <<
"Full PLL config file path: " << full_pll_config_file_path;
233 return full_pll_config_file_path;
238std::unique_ptr<const SI534xSlave>
251 TLOG() <<
"PLL configuration file : " << clock_config_file;
253 uint32_t si_pll_version = pll->read_device_version();
256 pll->configure(clock_config_file);
258 TLOG_DEBUG(0) <<
"PLL configuration id : " << pll->read_config_id();
266 return getNode<FrequencyCounterNode>(
"freq").measure_frequencies(
m_clock_names.size());
274 std::stringstream table;
276 for (uint8_t i = 0; i < frequencies.size(); ++i) {
277 table <<
m_clock_names.at(i) <<
" freq: " << std::setprecision(12) << frequencies.at(i) << std::endl;
281 TLOG() << table.str();
290 return get_pll()->get_status(print_out);
298 getNode(
"csr.ctrl.soft_rst").write(0x1);
299 getClient().dispatch();
326 std::stringstream status;
327 std::string sfp_i2c_bus;
329 sfp_i2c_bus = m_sfp_i2c_buses.at(sfp_id);
330 }
catch (
const std::out_of_range& e) {
333 auto sfp = get_i2c_device<I2CSFPSlave>(sfp_i2c_bus,
"SFP_EEProm");
334 status << sfp->get_status();
336 TLOG() << status.str();
345 std::string sfp_i2c_bus;
347 sfp_i2c_bus = m_sfp_i2c_buses.at(sfp_id);
348 }
catch (
const std::out_of_range& e) {
351 auto sfp = get_i2c_device<I2CSFPSlave>(sfp_i2c_bus,
"SFP_EEProm");
352 sfp->switch_soft_tx_control_bit(turn_on);
virtual uint32_t read_board_type() const
Read the word identifying the timing board.
virtual void write_soft_reset_register() const
Write soft reset register.
virtual void switch_sfp_soft_tx_control_bit(uint32_t sfp_id, bool turn_on) const
control tx laser of on-board SFP softly (I2C command)
virtual void reset(const std::string &clock_config_file) const =0
Reset timing node.
virtual std::vector< double > read_clock_frequencies() const
Read frequencies of on-board clocks.
virtual BoardRevision get_board_revision() const
Read the word identifying the timing board.
const std::string m_pll_i2c_bus
IONode(const uhal::Node &node, std::string uid_i2c_bus, std::string pll_i2c_bus, std::string pll_i2c_device, std::vector< std::string > clock_names, std::vector< std::string > sfp_i2c_buses)
const std::string m_pll_i2c_device
virtual uint32_t read_carrier_type() const
Read the word identifying the FPFA carrier board.
static const std::map< std::string, std::string > & get_clock_config_map()
virtual std::string get_sfp_status(uint32_t sfp_id, bool print_out=false) const
Print status of on-board SFP.
virtual std::string get_hardware_info(bool print_out=false) const
Print hardware information.
virtual std::string get_uid_address_parameter_name() const =0
Get the UID address parameter name.
virtual uint32_t read_design_type() const
Read the word identifying the firmware design in the FPGA.
const std::string m_uid_i2c_bus
virtual void soft_reset() const
Reset timing node.
const std::vector< std::string > m_clock_names
virtual std::string get_full_clock_config_file_path(const ClockSource &clock_source) const
Get the full config path.
virtual std::unique_ptr< const SI534xSlave > get_pll() const
Get the PLL chip.
static const std::map< uint64_t, BoardRevision > & get_board_uid_revision_map()
virtual uint64_t read_board_uid() const
Read the word containing the timing board UID.
virtual uint32_t read_firmware_frequency() const
Read the word identifying the frequency [units of Hz] of the firmware in the FPGA.
static const std::map< DesignType, std::string > & get_design_type_map()
virtual void configure_pll(const std::string &clock_config_file="") const
Configure clock chip.
static const std::map< BoardRevision, std::string > & get_board_revision_map()
virtual std::string get_clock_frequencies_table(bool print_out=false) const
Print frequencies of on-board clocks.
static const std::map< BoardType, std::string > & get_board_type_map()
std::unique_ptr< const T > get_i2c_device(const std::string &i2c_bus_name, const std::string &i2c_device_name) const
Get the an I2C chip.
virtual std::string get_pll_status(bool print_out=false) const
Print status of on-board PLL.
static const std::map< CarrierType, std::string > & get_carrier_type_map()
static std::string clock_source_to_string(const ClockSource &source)
Base class for timing nodes.
#define TLOG_DEBUG(lvl,...)
CarrierType convert_value_to_carrier_type(uint32_t darrier_type)
BoardType convert_value_to_board_type(uint32_t Board_type)
std::string format_reg_table(T data, std::string title, std::vector< std::string > headers)
Format reg-value table.
DesignType convert_value_to_design_type(uint32_t design_type)
std::string format_reg_value(T reg_value, uint32_t base)
void warning(const Issue &issue)
void error(const Issue &issue)