DUNE-DAQ
DUNE Trigger and Data Acquisition software
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Functions
dunedaq::timing::python Namespace Reference

Functions

std::map< std::string, FixedLengthCommandType > swap_commands_map (const std::map< FixedLengthCommandType, std::string > &command_map)
 
void register_definitions (py::module &m)
 
void register_endpoint (py::module &m)
 
void register_i2c (py::module &m)
 
void register_io (py::module &m)
 
void register_master (py::module &m)
 
void register_top_designs (py::module &)
 
void register_toolbox (py::module &)
 
 PYBIND11_MODULE (_daq_timing_py, top_module)
 

Function Documentation

◆ PYBIND11_MODULE()

dunedaq::timing::python::PYBIND11_MODULE ( _daq_timing_py ,
top_module  )

Definition at line 26 of file timing_wrapper.cpp.

26 {
27
28 top_module.doc() = "c++ implementation of timing python modules"; // optional module docstring
29
30 // timing.core
31 py::module_ core_module = top_module.def_submodule("core");
32
33 timing::python::register_i2c(core_module);
34 timing::python::register_endpoint(core_module);
35 timing::python::register_io(core_module);
36 timing::python::register_master(core_module);
37 timing::python::register_top_designs(core_module);
38
39 // timing.common
40 py::module_ common_module = top_module.def_submodule("common");
41
42 // timing.common.definitions
43 py::module_ defs_module = common_module.def_submodule("definitions");
44 timing::python::register_definitions(defs_module);
45
46 // timing.common.toolbox
47 py::module_ toolbox_module = common_module.def_submodule("toolbox");
48 timing::python::register_toolbox(toolbox_module);
49}

◆ register_definitions()

void dunedaq::timing::python::register_definitions ( py::module & m)

Definition at line 38 of file definitions.cpp.

39{
40 py::enum_<BoardType>(m, "BoardType")
41 .value("kBoardFMC", kBoardFMC)
42 .value("kBoardSim", kBoardSim)
43 .value("kBoardPC059", kBoardPC059)
44 .value("kBoardMicrozed", kBoardMicrozed)
45 .value("kBoardTLU", kBoardTLU)
46 .value("kBoardFIB", kBoardFIB)
47 .value("kBoardMIB", kBoardMIB)
48 .value("kBoardPC069", kBoardPC069)
49 .value("kBoardGIB", kBoardGIB)
50 .value("kBoardUnknown", kBoardUnknown)
51 .export_values();
52
53 py::enum_<BoardRevision>(m, "BoardRevision")
54 .value("kFMCRev1", kFMCRev1)
55 .value("kFMCRev2", kFMCRev2)
56 .value("kFMCRev3", kFMCRev3)
57 .value("kFMCRev4", kFMCRev4)
58 .value("kPC059Rev1", kPC059Rev1)
59 .value("kTLURev1", kTLURev1)
60 .value("kSIMRev1", kSIMRev1)
61 .value("kFIBRev1", kFIBRev1)
62 .value("kMIBRev1", kMIBRev1)
63 .value("kPC069a", kPC069a)
64 .value("kPC069b", kPC069b)
65 .value("kPC069c", kPC069c)
66 .value("kMIBRev2", kMIBRev2)
67 .value("kGIBRev1", kGIBRev1)
68 .value("kFIBRev2", kFIBRev2)
69 .export_values();
70
71 py::enum_<CarrierType>(m, "CarrierType")
72 .value("kCarrierEnclustraA35", kCarrierEnclustraA35)
73 .value("kCarrierKC705", kCarrierKC705)
74 .value("kCarrierMicrozed", kCarrierMicrozed)
75 .value("kCarrierATFC", kCarrierATFC)
76 .value("kCarrierAFC", kCarrierAFC)
77 .value("kCarrierNexusVideo", kCarrierNexusVideo)
78 .value("kCarrierTrenzTE0712", kCarrierTrenzTE0712)
79 .value("kCarrierUnknown", kCarrierUnknown)
80 .export_values();
81
82 py::enum_<DesignType>(m, "DesignType")
83 .value("kDesignMaster", kDesignMaster)
84 .value("kDesignOuroborosSim", kDesignOuroborosSim)
85 .value("kDesignOuroboros", kDesignOuroboros)
86 .value("kDesignTest", kDesignTest)
87 .value("kDesignEndpoint", kDesignEndpoint)
88 .value("kDesignFanout", kDesignFanout)
89 .value("kDesignOverlord", kDesignOverlord)
90 .value("kDesignEndpoBICRT", kDesignEndpoBICRT)
91 .value("kDesignChronos", kDesignChronos)
92 .value("kDesignBoreas", kDesignBoreas)
93 .value("kDesignKerberos", kDesignKerberos)
94 .value("kDesignGaia", kDesignGaia)
95 .value("kDesignCharon", kDesignCharon)
96 .value("kDesignHades", kDesignHades)
97 .value("kDesignUnknown", kDesignUnknown)
98 .export_values();
99
100 py::enum_<FixedLengthCommandType>(m, "FixedLengthCommandType")
101 .value("TimeSync", TimeSync)
102 .value("Echo", Echo)
103 .value("SpillStart", SpillStart)
104 .value("SpillStop", SpillStop)
105 .value("RunStart", RunStart)
106 .value("RunStop", RunStop)
107 .value("WibCalib", WibCalib)
108 .value("SSPCalib", SSPCalib)
109 .value("FakeTrig0", FakeTrig0)
110 .value("FakeTrig1", FakeTrig1)
111 .value("FakeTrig2", FakeTrig2)
112 .value("FakeTrig3", FakeTrig3)
113 .value("BeamTrig", BeamTrig)
114 .value("NoBeamTrig", NoBeamTrig)
115 .value("ExtFakeTrig", ExtFakeTrig)
116 .export_values();
117
118 py::enum_<ClockSource>(m, "ClockSource")
119 .value("kFreeRun", kFreeRun)
120 .value("kInput0", kInput0)
121 .value("kInput1", kInput1)
122 .value("kInput2", kInput2)
123 .value("kInput3", kInput3)
124 .export_values();
125
126 py::enum_<TimestampSource>(m, "TimestampSource")
127 .value("kUpstream", kUpstream)
128 .value("kSoftware", kSoftware)
129 .value("kMixed", kMixed)
130 .export_values();
131
132 py::enum_<IRIGEpoch>(m, "IRIGEpoch")
133 .value("kTAI", kTAI)
134 .value("kUNIX", kUNIX)
135 .export_values();
136
137 m.attr("kBoardNameMap") = timing::IONode::get_board_type_map();
138 m.attr("kCarrierNameMap") = timing::IONode::get_carrier_type_map();
139 m.attr("kDesignNameMap") = timing::IONode::get_design_type_map();
140 m.attr("kBoardRevisionMap") = timing::IONode::get_board_revision_map();
141 m.attr("kUIDRevisionMap") = timing::IONode::get_board_uid_revision_map();
142 m.attr("kClockConfigMap") = timing::IONode::get_clock_config_map();
143 m.attr("kEpStates") = EndpointNode::get_endpoint_state_map();
144 m.attr("kLibrarySupportedBoards") = timing::IONode::get_library_supported_boards();
145 m.attr("kLibrarySupportedDesigns") = timing::IONode::get_library_supported_designs();
146 m.attr("kMasterFWMajorRequired") = MasterNode::required_major_firmware_version;
147 m.attr("kHSIWordsNumber") = HSINode::hsi_buffer_event_words_number;
148}

◆ register_endpoint()

void dunedaq::timing::python::register_endpoint ( py::module & m)

Definition at line 22 of file endpoint.cpp.

23{
24
25 py::class_<timing::HSINode, uhal::Node>(m, "HSINode")
26 .def(py::init<const uhal::Node&>())
27 .def("get_status", &timing::HSINode::get_status, py::arg("print_out") = false)
28 .def("configure_hsi",
29 &timing::HSINode::configure_hsi,
30 py::arg("src"),
31 py::arg("re_mask"),
32 py::arg("fe_mask"),
33 py::arg("inv_mask"),
34 py::arg("rate"),
35 py::arg("clock_frequency_hz"),
36 py::arg("dispatch") = true)
37 .def("start_hsi", &timing::HSINode::start_hsi, py::arg("dispatch") = true)
38 .def("stop_hsi", &timing::HSINode::stop_hsi, py::arg("dispatch") = true)
39 .def("reset_hsi", &timing::HSINode::reset_hsi, py::arg("dispatch") = true)
40 .def("get_data_buffer_table",
41 &timing::HSINode::get_data_buffer_table,
42 py::arg("read_all") = false,
43 py::arg("print_out") = false)
44 .def("read_buffer_warning", &timing::HSINode::read_buffer_warning)
45 .def("read_buffer_error", &timing::HSINode::read_buffer_error)
46 .def<uhal::ValVector<uint32_t> (timing::HSINode::*)(uint16_t&, bool, bool) const>("read_data_buffer", &timing::HSINode::read_data_buffer);
47
48 py::class_<timing::EndpointNode, uhal::Node>(m, "EndpointNode")
49 .def(py::init<const uhal::Node&>())
50 .def("disable", &timing::EndpointNode::disable)
51 .def("enable", &timing::EndpointNode::enable, py::arg("address") = 0, py::arg("partition") = 0)
52 .def("reset", &timing::EndpointNode::reset, py::arg("address") = 0, py::arg("partition") = 0)
53 .def("get_status", &timing::EndpointNode::get_status, py::arg("print_out") = false);
54}
dunedaq::timing::HSINode
Class for HSI nodes.
Definition HSINode.hpp:37

◆ register_i2c()

void dunedaq::timing::python::register_i2c ( py::module & m)

Definition at line 29 of file i2c.cpp.

30{
31 // .def("hardReset", (void ( mp7::CtrlNode::*) (double)) 0, mp7_CTRLNODE_hardReset_overloads())
32
33 // Wrap timing::I2CMasterNode
34 py::class_<timing::I2CMasterNode, uhal::Node>(m, "I2CMasterNode")
35 .def(py::init<const uhal::Node&>())
36 .def("get_i2c_clock_prescale", &timing::I2CMasterNode::get_i2c_clock_prescale)
37 .def("read_i2c", &timing::I2CMasterNode::read_i2c)
38 .def("write_i2c",
39 &timing::I2CMasterNode::write_i2c,
40 py::arg("i2c_device_address"),
41 py::arg("i2c_reg_address"),
42 py::arg("data"),
43 py::arg("send_stop") = true)
44 .def("read_i2cArray", &timing::I2CMasterNode::read_i2cArray)
45 .def("write_i2cArray",
46 &timing::I2CMasterNode::write_i2cArray,
47 py::arg("i2c_device_address"),
48 py::arg("i2c_reg_address"),
49 py::arg("data"),
50 py::arg("send_stop") = true)
51 .def("read_i2cPrimitive", &timing::I2CMasterNode::read_i2cPrimitive)
52 .def("write_i2cPrimitive",
53 &timing::I2CMasterNode::write_i2cPrimitive,
54 py::arg("i2c_device_address"),
55 py::arg("data"),
56 py::arg("send_stop") = true)
57 .def("get_slaves", &timing::I2CMasterNode::get_slaves)
58 .def("get_slave", &timing::I2CMasterNode::get_slave, py::return_value_policy::reference_internal)
59 .def("get_slave_address", &timing::I2CMasterNode::get_slave_address)
60 .def("ping", &timing::I2CMasterNode::ping)
61 .def("scan", &timing::I2CMasterNode::scan)
62 .def("reset", &timing::I2CMasterNode::reset);
63
64 // Wrap timing::I2CSlave
65 py::class_<timing::I2CSlave>(m, "I2CSlave")
66 .def("get_i2c_address", &timing::I2CSlave::get_i2c_address)
67 .def<uint8_t (timing::I2CSlave::*)(uint32_t) const>("read_i2c", // NOLINT(build/unsigned)
68 &timing::I2CSlave::read_i2c)
69 .def<uint8_t (timing::I2CSlave::*)(uint32_t, uint32_t) const>("read_i2c", // NOLINT(build/unsigned)
70 &timing::I2CSlave::read_i2c)
71 .def<void (timing::I2CSlave::*)(uint32_t, uint8_t, bool) const>("write_i2c", // NOLINT(build/unsigned)
72 &timing::I2CSlave::write_i2c,
73 py::arg("i2c_reg_address"),
74 py::arg("data"),
75 py::arg("send_stop") = true)
76 .def<void (timing::I2CSlave::*)(uint32_t, uint32_t, uint8_t, bool) const>("write_i2c", // NOLINT(build/unsigned)
77 &timing::I2CSlave::write_i2c,
78 py::arg("i2c_device_address"),
79 py::arg("i2c_reg_address"),
80 py::arg("data"),
81 py::arg("send_stop") = true)
82 .def<std::vector<uint8_t> (timing::I2CSlave::*)(uint32_t, uint32_t) const>( // NOLINT(build/unsigned)
83 "read_i2cArray",
84 &timing::I2CSlave::read_i2cArray)
85 .def<std::vector<uint8_t> (timing::I2CSlave::*)(uint32_t, uint32_t, uint32_t) const>( // NOLINT(build/unsigned)
86 "read_i2cArray",
87 &timing::I2CSlave::read_i2cArray)
88 .def<void (timing::I2CSlave::*)(uint32_t, std::vector<uint8_t>, bool) const>( // NOLINT(build/unsigned)
89 "write_i2cArray",
90 &timing::I2CSlave::write_i2cArray,
91 py::arg("i2c_reg_address"),
92 py::arg("data"),
93 py::arg("send_stop") = true)
94 .def<void (timing::I2CSlave::*)(uint32_t, uint32_t, std::vector<uint8_t>, bool) const>( // NOLINT(build/unsigned)
95 "write_i2cArray",
96 &timing::I2CSlave::write_i2cArray,
97 py::arg("i2c_device_address"),
98 py::arg("i2c_reg_address"),
99 py::arg("data"),
100 py::arg("send_stop") = true)
101 .def("read_i2cPrimitive", &timing::I2CSlave::read_i2cPrimitive)
102 .def("write_i2cPrimitive", &timing::I2CSlave::write_i2cPrimitive, py::arg("data"), py::arg("send_stop") = true)
103 .def("ping", &timing::I2CSlave::ping);
104
105 // Wrap SIChipSlave
106 py::class_<timing::SIChipSlave, timing::I2CSlave>(m, "SIChipSlave")
107 .def(py::init<const timing::I2CMasterNode*, uint8_t>()) // NOLINT(build/unsigned)
108 .def("read_page", &timing::SIChipSlave::read_page)
109 .def("switch_page", &timing::SIChipSlave::switch_page)
110 .def("read_device_version", &timing::SIChipSlave::read_device_version)
111 .def("read_clock_register", &timing::SIChipSlave::read_clock_register)
112 .def("write_clock_register", &timing::SIChipSlave::write_clock_register);
113
114 // Wrap SI534xSlave
115 py::class_<timing::SI534xSlave, timing::SIChipSlave>(m, "SI534xSlave")
116 .def(py::init<const timing::I2CMasterNode*, uint8_t>()) // NOLINT(build/unsigned)
117 .def("configure", &timing::SI534xSlave::configure)
118 .def("read_config_id", &timing::SI534xSlave::read_config_id)
119 // .def("registers", &timing::SI534xSlave::registers)
120 ;
121
122 // Wrap SI534xNode
123 py::class_<timing::SI534xNode, timing::SI534xSlave, timing::I2CMasterNode>(m, "SI534xNode")
124 .def(py::init<const uhal::Node&>());
125
126 // Wrap I2CExpanderSlave
127 py::class_<timing::I2CExpanderSlave, timing::I2CSlave>(m, "I2CExpanderSlave")
128 .def(py::init<const timing::I2CMasterNode*, uint8_t>()) // NOLINT(build/unsigned)
129 .def("set_io", &timing::I2CExpanderSlave::set_io)
130 .def("set_inversion", &timing::I2CExpanderSlave::set_inversion)
131 .def("set_outputs", &timing::I2CExpanderSlave::set_outputs)
132 .def("read_inputs", &timing::I2CExpanderSlave::read_inputs)
133 .def("debug", &timing::I2CExpanderSlave::debug);
134
135// // Wrap I2CExpanderNode
136// py::class_<timing::I2CExpanderNode, timing::I2CExpanderSlave, timing::I2CMasterNode>(m, "I2CExpanderNode")
137// .def(py::init<const uhal::Node&>());
138
139 // Wrap DACSlave
140 py::class_<timing::DACSlave, timing::I2CSlave>(m, "DACSlave")
141 .def(py::init<const timing::I2CMasterNode*, uint8_t>()) // NOLINT(build/unsigned)
142 .def("set_interal_ref", &timing::DACSlave::set_interal_ref)
143 .def("set_dac", &timing::DACSlave::set_dac);
144
145 // Wrap DACNode
146 py::class_<timing::DACNode, timing::DACSlave, timing::I2CMasterNode>(m, "DACNode").def(py::init<const uhal::Node&>());
147} // NOLINT(readability/fn_size)

◆ register_io()

void dunedaq::timing::python::register_io ( py::module & m)

Definition at line 33 of file io.cpp.

34{
35
36 py::class_<timing::IONode, uhal::Node>(m, "IONode");
37
38 py::class_<timing::FMCIONode, timing::IONode, uhal::Node>(m, "FMCIONode")
39 .def(py::init<const uhal::Node&>())
40 .def<void (timing::FMCIONode::*)(const std::string&) const>(
41 "reset", &timing::FMCIONode::reset, py::arg("clock_config_file"))
42 .def<void (timing::FMCIONode::*)(const timing::ClockSource&) const>(
43 "reset", &timing::FMCIONode::reset, py::arg("clock_source"))
44 .def("soft_reset", &timing::FMCIONode::soft_reset)
45 .def("read_firmware_frequency", &timing::FMCIONode::read_firmware_frequency)
46 .def("get_clock_frequencies_table", &timing::FMCIONode::get_clock_frequencies_table, py::arg("print_out") = false)
47 .def("get_status", &timing::FMCIONode::get_status, py::arg("print_out") = false)
48 .def("get_pll_status", &timing::FMCIONode::get_pll_status, py::arg("print_out") = false)
49 .def("get_hardware_info", &timing::FMCIONode::get_hardware_info, py::arg("print_out") = false)
50 .def("get_sfp_status", &timing::FMCIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
51 .def("switch_sfp_soft_tx_control_bit", &timing::FMCIONode::switch_sfp_soft_tx_control_bit)
52 .def("switch_sfp_tx", &timing::FMCIONode::switch_sfp_tx);
53
54 py::class_<timing::PC059IONode, timing::IONode, uhal::Node>(m, "PC059IONode")
55 .def(py::init<const uhal::Node&>())
56 .def<void (timing::PC059IONode::*)(const std::string&) const>(
57 "reset", &timing::PC059IONode::reset, py::arg("clock_config_file"))
58 .def<void (timing::PC059IONode::*)(const timing::ClockSource&) const>(
59 "reset", &timing::PC059IONode::reset, py::arg("clock_source"))
60 .def("soft_reset", &timing::PC059IONode::soft_reset)
61 .def("read_firmware_frequency", &timing::PC059IONode::read_firmware_frequency)
62 .def("get_clock_frequencies_table", &timing::PC059IONode::get_clock_frequencies_table, py::arg("print_out") = false)
63 .def("get_status", &timing::PC059IONode::get_status, py::arg("print_out") = false)
64 .def("get_pll_status", &timing::PC059IONode::get_pll_status, py::arg("print_out") = false)
65 .def("get_hardware_info", &timing::PC059IONode::get_hardware_info, py::arg("print_out") = false)
66 .def("get_sfp_status", &timing::PC059IONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
67 .def("switch_sfp_soft_tx_control_bit", &timing::PC059IONode::switch_sfp_soft_tx_control_bit)
68 .def("switch_sfp_mux_channel", &timing::PC059IONode::switch_sfp_mux_channel, py::arg("mux_channel"))
69 .def("read_active_sfp_mux_channel", &timing::PC059IONode::read_active_sfp_mux_channel)
70 .def("switch_sfp_tx", &timing::PC059IONode::switch_sfp_tx);
71
72 py::class_<timing::FIBIONode, timing::IONode, uhal::Node>(m, "FIBIONode")
73 .def(py::init<const uhal::Node&>())
74 .def<void (timing::FIBIONode::*)(const std::string&) const>(
75 "reset", &timing::FIBIONode::reset, py::arg("clock_config_file"))
76 .def<void (timing::FIBIONode::*)(const timing::ClockSource&) const>(
77 "reset", &timing::FIBIONode::reset, py::arg("clock_source"))
78 .def("soft_reset", &timing::FIBIONode::soft_reset)
79 .def("read_firmware_frequency", &timing::FIBIONode::read_firmware_frequency)
80 .def("get_clock_frequencies_table", &timing::FIBIONode::get_clock_frequencies_table, py::arg("print_out") = false)
81 .def("get_status", &timing::FIBIONode::get_status, py::arg("print_out") = false)
82 .def("get_pll_status", &timing::FIBIONode::get_pll_status, py::arg("print_out") = false)
83 .def("get_hardware_info", &timing::FIBIONode::get_hardware_info, py::arg("print_out") = false)
84 .def("get_sfp_status", &timing::FIBIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
85 .def("switch_sfp_soft_tx_control_bit", &timing::FIBIONode::switch_sfp_soft_tx_control_bit)
86 .def("switch_sfp_mux_channel", &timing::FIBIONode::switch_sfp_mux_channel, py::arg("mux_channel"))
87 .def("read_active_sfp_mux_channel", &timing::FIBIONode::read_active_sfp_mux_channel)
88 .def("switch_sfp_tx", &timing::FIBIONode::switch_sfp_tx);
89
90 py::class_<timing::FIBV2IONode, timing::IONode, uhal::Node>(m, "FIBV2IONode")
91 .def(py::init<const uhal::Node&>())
92 .def<void (timing::FIBV2IONode::*)(const timing::ClockSource&) const>(
93 "reset", &timing::FIBV2IONode::reset, py::arg("clock_source"))
94 .def("soft_reset", &timing::FIBV2IONode::soft_reset)
95 .def("read_firmware_frequency", &timing::FIBV2IONode::read_firmware_frequency)
96 .def("get_clock_frequencies_table", &timing::FIBV2IONode::get_clock_frequencies_table, py::arg("print_out") = false)
97 .def("get_status", &timing::FIBV2IONode::get_status, py::arg("print_out") = false)
98 .def("get_pll_status", &timing::FIBV2IONode::get_pll_status, py::arg("print_out") = false)
99 .def("get_hardware_info", &timing::FIBV2IONode::get_hardware_info, py::arg("print_out") = false)
100 .def("get_sfp_status", &timing::FIBV2IONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
101 .def("switch_sfp_soft_tx_control_bit", &timing::FIBV2IONode::switch_sfp_soft_tx_control_bit)
102 .def("switch_sfp_tx", &timing::FIBV2IONode::switch_sfp_tx);
103
104 py::class_<timing::TLUIONode, timing::IONode, uhal::Node>(m, "TLUIONode")
105 .def(py::init<const uhal::Node&>())
106 .def<void (timing::TLUIONode::*)(const std::string&) const>(
107 "reset", &timing::TLUIONode::reset, py::arg("clock_config_file"))
108 .def<void (timing::TLUIONode::*)(const timing::ClockSource&) const>(
109 "reset", &timing::TLUIONode::reset, py::arg("clock_source"))
110 .def("soft_reset", &timing::TLUIONode::soft_reset)
111 .def("read_firmware_frequency", &timing::TLUIONode::read_firmware_frequency)
112 .def("get_clock_frequencies_table", &timing::TLUIONode::get_clock_frequencies_table, py::arg("print_out") = false)
113 .def("get_status", &timing::TLUIONode::get_status, py::arg("print_out") = false)
114 .def("get_pll_status", &timing::TLUIONode::get_pll_status, py::arg("print_out") = false)
115 .def("get_hardware_info", &timing::TLUIONode::get_hardware_info, py::arg("print_out") = false)
116 .def("get_sfp_status", &timing::TLUIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
117 .def("switch_sfp_soft_tx_control_bit", &timing::TLUIONode::switch_sfp_soft_tx_control_bit)
118 .def("configure_dac",
119 &timing::TLUIONode::configure_dac,
120 py::arg("dac_id"),
121 py::arg("dac_value"),
122 py::arg("internal_ref") = false)
123 .def("switch_sfp_tx", &timing::TLUIONode::switch_sfp_tx);
124
125 py::class_<timing::SIMIONode, timing::IONode, uhal::Node>(m, "SIMIONode")
126 .def(py::init<const uhal::Node&>())
127 .def<void (timing::SIMIONode::*)(const std::string&) const>(
128 "reset", &timing::SIMIONode::reset, py::arg("clock_config_file"))
129 .def<void (timing::SIMIONode::*)(const timing::ClockSource&) const>(
130 "reset", &timing::SIMIONode::reset, py::arg("clock_source"))
131 .def("soft_reset", &timing::SIMIONode::soft_reset)
132 .def("read_firmware_frequency", &timing::SIMIONode::read_firmware_frequency)
133 .def("get_clock_frequencies_table", &timing::SIMIONode::get_clock_frequencies_table, py::arg("print_out") = false)
134 .def("get_status", &timing::SIMIONode::get_status, py::arg("print_out") = false)
135 .def("get_pll_status", &timing::SIMIONode::get_pll_status, py::arg("print_out") = false)
136 .def("get_hardware_info", &timing::SIMIONode::get_hardware_info, py::arg("print_out") = false)
137 .def("get_sfp_status", &timing::SIMIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
138 .def("switch_sfp_soft_tx_control_bit", &timing::SIMIONode::switch_sfp_soft_tx_control_bit)
139 .def("switch_sfp_tx", &timing::SIMIONode::switch_sfp_tx);
140
141 py::class_<timing::MIBIONode, timing::IONode, uhal::Node>(m, "MIBIONode")
142 .def(py::init<const uhal::Node&>())
143 .def<void (timing::MIBIONode::*)(const std::string&) const>(
144 "reset", &timing::MIBIONode::reset, py::arg("clock_config_file"))
145 .def<void (timing::MIBIONode::*)(const timing::ClockSource&) const>(
146 "reset", &timing::MIBIONode::reset, py::arg("clock_source"))
147 .def("soft_reset", &timing::MIBIONode::soft_reset)
148 .def("read_firmware_frequency", &timing::MIBIONode::read_firmware_frequency)
149 .def("get_clock_frequencies_table", &timing::MIBIONode::get_clock_frequencies_table, py::arg("print_out") = false)
150 .def("get_status", &timing::MIBIONode::get_status, py::arg("print_out") = false)
151 .def("get_pll_status", &timing::MIBIONode::get_pll_status, py::arg("print_out") = false)
152 .def("get_pll", &timing::MIBIONode::get_pll)
153 .def("get_hardware_info", &timing::MIBIONode::get_hardware_info, py::arg("print_out") = false)
154 .def("get_sfp_status", &timing::MIBIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
155 .def("switch_sfp_soft_tx_control_bit", &timing::MIBIONode::switch_sfp_soft_tx_control_bit)
156 .def("switch_sfp_tx", &timing::MIBIONode::switch_sfp_tx)
157 ;
158
159 py::class_<timing::SwitchyardNode, uhal::Node>(m, "SwitchyardNode")
160 .def("get_status", &timing::SwitchyardNode::get_status, py::arg("print_out") = false)
161 .def("configure_master_source", &timing::SwitchyardNode::configure_master_source, py::arg("master_source"), py::arg("dispatch") = true)
162 .def("configure_endpoint_source", &timing::SwitchyardNode::configure_endpoint_source, py::arg("endpoint_source"), py::arg("dispatch") = true);
163
164 py::class_<timing::MIBV2IONode, timing::IONode, uhal::Node>(m, "MIBV2IONode")
165 .def(py::init<const uhal::Node&>())
166 .def<void (timing::MIBV2IONode::*)(const std::string&) const>(
167 "reset", &timing::MIBV2IONode::reset, py::arg("clock_config_file"))
168 .def<void (timing::MIBV2IONode::*)(const timing::ClockSource&) const>(
169 "reset", &timing::MIBV2IONode::reset, py::arg("clock_source"))
170 .def("soft_reset", &timing::MIBV2IONode::soft_reset)
171 .def("read_firmware_frequency", &timing::MIBV2IONode::read_firmware_frequency)
172 .def("get_clock_frequencies_table", &timing::MIBV2IONode::get_clock_frequencies_table, py::arg("print_out") = false)
173 .def("get_status", &timing::MIBV2IONode::get_status, py::arg("print_out") = false)
174 .def("get_pll_status", &timing::MIBV2IONode::get_pll_status, py::arg("print_out") = false)
175 .def("get_pll", &timing::MIBV2IONode::get_pll)
176 .def("get_hardware_info", &timing::MIBV2IONode::get_hardware_info, py::arg("print_out") = false)
177 .def("get_sfp_status", &timing::MIBV2IONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
178 .def("switch_sfp_soft_tx_control_bit", &timing::MIBV2IONode::switch_sfp_soft_tx_control_bit)
179 .def("switch_sfp_tx", &timing::MIBV2IONode::switch_sfp_tx)
180 ;
181
182 py::class_<timing::GIBIONode, timing::IONode, uhal::Node>(m, "GIBIONode")
183 .def(py::init<const uhal::Node&>())
184 .def<void (timing::GIBIONode::*)(const std::string&) const>(
185 "reset", &timing::GIBIONode::reset, py::arg("clock_config_file"))
186 .def<void (timing::GIBIONode::*)(const timing::ClockSource&) const>(
187 "reset", &timing::GIBIONode::reset, py::arg("clock_source"))
188 .def("soft_reset", &timing::GIBIONode::soft_reset)
189 .def("read_firmware_frequency", &timing::GIBIONode::read_firmware_frequency)
190 .def("get_clock_frequencies_table", &timing::GIBIONode::get_clock_frequencies_table, py::arg("print_out") = false)
191 .def("get_status", &timing::GIBIONode::get_status, py::arg("print_out") = false)
192 .def("get_pll_status", &timing::GIBIONode::get_pll_status, py::arg("print_out") = false)
193 .def("get_pll", &timing::GIBIONode::get_pll)
194 .def("get_hardware_info", &timing::GIBIONode::get_hardware_info, py::arg("print_out") = false)
195 .def("get_sfp_status", &timing::GIBIONode::get_sfp_status, py::arg("sfp_id"), py::arg("print_out") = false)
196 .def("switch_sfp_soft_tx_control_bit", &timing::GIBIONode::switch_sfp_soft_tx_control_bit)
197 .def("set_i2c_mux_channels", &timing::GIBIONode::set_i2c_mux_channels)
198 .def("switch_sfp_tx", &timing::GIBIONode::switch_sfp_tx)
199 ;
200
201} // NOLINT
dunedaq::timing::FIBIONode
Class for the FIB board.
Definition FIBIONode.hpp:32
dunedaq::timing::FIBV2IONode
Class for the FIB board.
Definition FIBV2IONode.hpp:35
dunedaq::timing::FMCIONode
Class for the timing FMC board.
Definition FMCIONode.hpp:33
dunedaq::timing::GIBIONode
Class for the timing FMC board.
Definition GIBIONode.hpp:33
dunedaq::timing::MIBIONode
Class for the timing FMC board.
Definition MIBIONode.hpp:34
dunedaq::timing::MIBV2IONode
Class for the timing FMC board.
Definition MIBV2IONode.hpp:33
dunedaq::timing::PC059IONode
Class for the PC059 board.
Definition PC059IONode.hpp:34
dunedaq::timing::SIMIONode
Class for the timing simulation IO.
Definition SIMIONode.hpp:34
dunedaq::timing::TLUIONode
Class for the TLU board.
Definition TLUIONode.hpp:34

◆ register_master()

void dunedaq::timing::python::register_master ( py::module & m)

Definition at line 23 of file master.cpp.

24{
25 py::class_<timing::MasterNode, uhal::Node>(m, "MasterNode")
26 .def(py::init<const uhal::Node&>())
27 .def("switch_endpoint_sfp", &timing::MasterNode::switch_endpoint_sfp)
28 .def("enable_upstream_endpoint", &timing::MasterNode::enable_upstream_endpoint)
29 .def("reset_command_counters", &timing::MasterNode::reset_command_counters)
30 .def("transmit_async_packet", &timing::MasterNode::transmit_async_packet, py::arg("packet"), py::arg("timeout") = 500) //timeout [us]
31 .def("write_endpoint_data", &timing::MasterNode::write_endpoint_data)
32 .def("read_endpoint_data", &timing::MasterNode::read_endpoint_data)
33 .def("send_fl_cmd",
34 &timing::MasterNode::send_fl_cmd,
35 py::arg("command"),
36 py::arg("channel"),
37 py::arg("number_of_commands") = 1)
38 .def<void (timing::MasterNode::*)(uint32_t, uint32_t, double, bool, uint32_t) const>("enable_periodic_fl_cmd",
39 &timing::MasterNode::enable_periodic_fl_cmd,
40 py::arg("command"),
41 py::arg("channel"),
42 py::arg("rate"),
43 py::arg("poisson"),
44 py::arg("clock_frequency_hz"))
45 .def("disable_periodic_fl_cmd", &timing::MasterNode::disable_periodic_fl_cmd)
46 .def("get_status", &timing::MasterNode::get_status, py::arg("print_out") = false)
47 .def("get_status_with_date", &timing::MasterNode::get_status_with_date, py::arg("clock_frequency_hz"), py::arg("print_out") = false)
48 .def("sync_timestamp", &timing::MasterNode::sync_timestamp, py::arg("source"))
49 .def("disable_timestamp_broadcast", &timing::MasterNode::disable_timestamp_broadcast)
50 .def("enable_timestamp_broadcast", &timing::MasterNode::enable_timestamp_broadcast)
51 .def("configure_endpoint_command_decoder", &timing::MasterNode::configure_endpoint_command_decoder,
52 py::arg("endpoint_address"),
53 py::arg("slot"),
54 py::arg("command"));
55
56 py::class_<timing::UpstreamCDRNode, uhal::Node>(m, "UpstreamCDRNode")
57 .def(py::init<const uhal::Node&>())
58 .def("get_status", &timing::UpstreamCDRNode::get_status, py::arg("print_out") = false)
59 .def("resync", &timing::UpstreamCDRNode::resync);
60
61 py::class_<timing::IRIGTimestampNode, uhal::Node>(m, "IRIGTimestampNode")
62 .def(py::init<const uhal::Node&>())
63 .def("get_status", &timing::IRIGTimestampNode::get_status, py::arg("print_out") = false)
64 .def("set_irig_epoch", &timing::IRIGTimestampNode::set_irig_epoch, py::arg("irig_epoch"))
65 ;
66
67}
dunedaq::timing::MasterNode
Class for PD-II/DUNE master timing nodes.
Definition MasterNode.hpp:39

◆ register_toolbox()

void dunedaq::timing::python::register_toolbox ( py::module & m)
extern

Definition at line 21 of file toolbox.cpp.

22{
23 m.def("format_firmware_version", &timing::format_firmware_version);
24}

◆ register_top_designs()

void dunedaq::timing::python::register_top_designs ( py::module & m)
extern

Definition at line 29 of file top_designs.cpp.

30{
31 // Boreas
32 py::class_<timing::BoreasDesign, uhal::Node>(m, "BoreasDesign")
33 .def("read_firmware_version", &timing::BoreasDesign::read_firmware_version)
34 .def("validate_firmware_version", &timing::BoreasDesign::validate_firmware_version)
35 .def("sync_timestamp", &timing::BoreasDesign::sync_timestamp)
36 .def("get_status", &timing::BoreasDesign::get_status)
37 .def<void (timing::BoreasDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
38 &timing::BoreasDesign::enable_periodic_fl_cmd,
39 py::arg("channel"),
40 py::arg("rate"),
41 py::arg("poisson"))
42 .def<void (timing::BoreasDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
43 &timing::BoreasDesign::enable_periodic_fl_cmd,
44 py::arg("command"),
45 py::arg("channel"),
46 py::arg("rate"),
47 py::arg("poisson"))
48 .def("apply_endpoint_delay",
49 &timing::BoreasDesign::apply_endpoint_delay,
50 py::arg("address"),
51 py::arg("coarse_delay"),
52 py::arg("fine_delay"),
53 py::arg("phase_delay"),
54 py::arg("measure_rtt") = false,
55 py::arg("control_sfp") = true,
56 py::arg("sfp_mux") = -1)
57 .def("measure_endpoint_rtt",
58 &timing::BoreasDesign::measure_endpoint_rtt,
59 py::arg("address"),
60 py::arg("control_sfp") = true,
61 py::arg("sfp_mux") = -1)
62 .def("get_hsi_node", &timing::BoreasDesign::get_hsi_node)
63 .def("configure_hsi",
64 &timing::BoreasDesign::configure_hsi,
65 py::arg("src"),
66 py::arg("re_mask"),
67 py::arg("fe_mask"),
68 py::arg("inv_mask"),
69 py::arg("rate"),
70 py::arg("dispatch") = true)
71 .def("configure", &timing::BoreasDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
72 ;
73
74 // Fanout
75 py::class_<timing::FanoutDesign, uhal::Node>(m, "FanoutDesign")
76 .def("read_firmware_version", &timing::FanoutDesign::read_firmware_version)
77 .def("validate_firmware_version", &timing::FanoutDesign::validate_firmware_version)
78 .def("switch_mux", &timing::FanoutDesign::switch_mux, py::arg("mux"), py::arg("resync_cdr") = false)
79 .def("read_active_mux", &timing::FanoutDesign::read_active_mux)
80 .def("configure", &timing::FanoutDesign::configure, py::arg("clock_source"))
81 ;
82
83 // Ouroboros mux
84 py::class_<timing::OuroborosMuxDesign, uhal::Node>(m, "OuroborosMuxDesign")
85 .def("read_firmware_version", &timing::OuroborosMuxDesign::read_firmware_version)
86 .def("validate_firmware_version", &timing::OuroborosMuxDesign::validate_firmware_version)
87 .def("sync_timestamp", &timing::OuroborosMuxDesign::sync_timestamp)
88 .def<void (timing::OuroborosMuxDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
89 &timing::OuroborosMuxDesign::enable_periodic_fl_cmd,
90 py::arg("channel"),
91 py::arg("rate"),
92 py::arg("poisson"))
93 .def<void (timing::OuroborosMuxDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
94 &timing::OuroborosMuxDesign::enable_periodic_fl_cmd,
95 py::arg("command"),
96 py::arg("channel"),
97 py::arg("rate"),
98 py::arg("poisson"))
99 .def("switch_mux", &timing::OuroborosMuxDesign::switch_mux, py::arg("mux"), py::arg("resync_cdr") = false)
100 .def("read_active_mux", &timing::OuroborosMuxDesign::read_active_mux)
101 .def("apply_endpoint_delay",
102 &timing::OuroborosMuxDesign::apply_endpoint_delay,
103 py::arg("address"),
104 py::arg("coarse_delay"),
105 py::arg("fine_delay"),
106 py::arg("phase_delay"),
107 py::arg("measure_rtt") = false,
108 py::arg("control_sfp") = true,
109 py::arg("sfp_mux") = -1)
110 .def("measure_endpoint_rtt",
111 &timing::OuroborosMuxDesign::measure_endpoint_rtt,
112 py::arg("address"),
113 py::arg("control_sfp") = true,
114 py::arg("sfp_mux") = -1)
115 .def("scan_sfp_mux", &timing::OuroborosMuxDesign::scan_sfp_mux)
116 .def("configure", &timing::OuroborosMuxDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
117 ;
118
119 // Master mux
120 py::class_<timing::MasterMuxDesign, uhal::Node>(m, "MasterMuxDesign")
121 .def("read_firmware_version", &timing::MasterMuxDesign::read_firmware_version)
122 .def("validate_firmware_version", &timing::MasterMuxDesign::validate_firmware_version)
123 .def("sync_timestamp", &timing::MasterMuxDesign::sync_timestamp)
124 .def<void (timing::MasterMuxDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
125 &timing::MasterMuxDesign::enable_periodic_fl_cmd,
126 py::arg("channel"),
127 py::arg("rate"),
128 py::arg("poisson"))
129 .def<void (timing::MasterMuxDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
130 &timing::MasterMuxDesign::enable_periodic_fl_cmd,
131 py::arg("command"),
132 py::arg("channel"),
133 py::arg("rate"),
134 py::arg("poisson"))
135 .def("switch_mux", &timing::MasterMuxDesign::switch_mux, py::arg("mux"), py::arg("resync_cdr") = false)
136 .def("read_active_mux", &timing::MasterMuxDesign::read_active_mux)
137 .def("apply_endpoint_delay",
138 &timing::MasterMuxDesign::apply_endpoint_delay,
139 py::arg("address"),
140 py::arg("coarse_delay"),
141 py::arg("fine_delay"),
142 py::arg("phase_delay"),
143 py::arg("measure_rtt") = false,
144 py::arg("control_sfp") = true,
145 py::arg("sfp_mux") = -1)
146 .def("measure_endpoint_rtt",
147 &timing::MasterMuxDesign::measure_endpoint_rtt,
148 py::arg("address"),
149 py::arg("control_sfp") = true,
150 py::arg("sfp_mux") = -1)
151 .def("scan_sfp_mux", &timing::MasterMuxDesign::scan_sfp_mux)
152 .def("configure", &timing::MasterMuxDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
153 ;
154
155 // Master
156 py::class_<timing::MasterDesign, uhal::Node>(m, "MasterDesign")
157 .def("read_firmware_version", &timing::MasterDesign::read_firmware_version)
158 .def("validate_firmware_version", &timing::MasterDesign::validate_firmware_version)
159 .def("sync_timestamp", &timing::MasterDesign::sync_timestamp)
160 .def("get_status", &timing::MasterDesign::get_status)
161 .def<void (timing::MasterDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
162 &timing::MasterDesign::enable_periodic_fl_cmd,
163 py::arg("channel"),
164 py::arg("rate"),
165 py::arg("poisson"))
166 .def<void (timing::MasterDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
167 &timing::MasterDesign::enable_periodic_fl_cmd,
168 py::arg("command"),
169 py::arg("channel"),
170 py::arg("rate"),
171 py::arg("poisson"))
172 .def("apply_endpoint_delay",
173 &timing::MasterDesign::apply_endpoint_delay,
174 py::arg("address"),
175 py::arg("coarse_delay"),
176 py::arg("fine_delay"),
177 py::arg("phase_delay"),
178 py::arg("measure_rtt") = false,
179 py::arg("control_sfp") = true,
180 py::arg("sfp_mux") = -1)
181 .def("measure_endpoint_rtt",
182 &timing::MasterDesign::measure_endpoint_rtt,
183 py::arg("address"),
184 py::arg("control_sfp") = true,
185 py::arg("sfp_mux") = -1)
186 .def("configure", &timing::MasterDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
187 ;
188
189 // Ouroboros
190 py::class_<timing::OuroborosDesign, uhal::Node>(m, "OuroborosDesign")
191 .def("read_firmware_version", &timing::OuroborosDesign::read_firmware_version)
192 .def("validate_firmware_version", &timing::OuroborosDesign::validate_firmware_version)
193 .def("sync_timestamp", &timing::OuroborosDesign::sync_timestamp)
194 .def("get_status", &timing::OuroborosDesign::get_status)
195 .def<void (timing::OuroborosDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
196 &timing::OuroborosDesign::enable_periodic_fl_cmd,
197 py::arg("channel"),
198 py::arg("rate"),
199 py::arg("poisson"))
200 .def<void (timing::OuroborosDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
201 &timing::OuroborosDesign::enable_periodic_fl_cmd,
202 py::arg("command"),
203 py::arg("channel"),
204 py::arg("rate"),
205 py::arg("poisson"))
206 .def("apply_endpoint_delay",
207 &timing::OuroborosDesign::apply_endpoint_delay,
208 py::arg("address"),
209 py::arg("coarse_delay"),
210 py::arg("fine_delay"),
211 py::arg("phase_delay"),
212 py::arg("measure_rtt") = false,
213 py::arg("control_sfp") = true,
214 py::arg("sfp_mux") = -1)
215 .def("measure_endpoint_rtt",
216 &timing::OuroborosDesign::measure_endpoint_rtt,
217 py::arg("address"),
218 py::arg("control_sfp") = true,
219 py::arg("sfp_mux") = -1)
220 .def("configure", &timing::OuroborosDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
221 ;
222
223 // Endpoint
224 py::class_<timing::EndpointDesign, uhal::Node>(m, "EndpointDesign")
225 .def("read_firmware_version", &timing::EndpointDesign::read_firmware_version)
226 .def("validate_firmware_version", &timing::EndpointDesign::validate_firmware_version)
227 .def("get_status", &timing::EndpointDesign::get_status)
228 .def("configure", &timing::EndpointDesign::configure, py::arg("clock_source"))
229 ;
230
231 // Chronos
232 py::class_<timing::ChronosDesign, uhal::Node>(m, "ChronosDesign")
233 .def("read_firmware_version", &timing::ChronosDesign::read_firmware_version)
234 .def("validate_firmware_version", &timing::ChronosDesign::validate_firmware_version)
235 .def("get_status", &timing::ChronosDesign::get_status)
236 .def("get_hsi_node", &timing::ChronosDesign::get_hsi_node)
237 .def("configure_hsi",
238 &timing::ChronosDesign::configure_hsi,
239 py::arg("src"),
240 py::arg("re_mask"),
241 py::arg("fe_mask"),
242 py::arg("inv_mask"),
243 py::arg("rate"),
244 py::arg("dispatch") = true)
245 .def("configure", &timing::ChronosDesign::configure, py::arg("clock_source"))
246 ;
247
248 // Hades
249 py::class_<timing::HadesDesign, uhal::Node>(m, "HadesDesign")
250 .def("read_firmware_version", &timing::HadesDesign::read_firmware_version)
251 .def("validate_firmware_version", &timing::HadesDesign::validate_firmware_version)
252 .def("get_status", &timing::HadesDesign::get_status)
253 .def("get_hsi_node", &timing::HadesDesign::get_hsi_node)
254 .def("configure_hsi",
255 &timing::HadesDesign::configure_hsi,
256 py::arg("src"),
257 py::arg("re_mask"),
258 py::arg("fe_mask"),
259 py::arg("inv_mask"),
260 py::arg("rate"),
261 py::arg("dispatch") = true)
262 .def("configure", &timing::HadesDesign::configure, py::arg("clock_source"))
263 ;
264
265 // Kerberos
266 py::class_<timing::KerberosDesign, uhal::Node>(m, "KerberosDesign")
267 .def("read_firmware_version", &timing::KerberosDesign::read_firmware_version)
268 .def("validate_firmware_version", &timing::KerberosDesign::validate_firmware_version)
269 .def("sync_timestamp", &timing::KerberosDesign::sync_timestamp)
270 .def<void (timing::KerberosDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
271 &timing::KerberosDesign::enable_periodic_fl_cmd,
272 py::arg("channel"),
273 py::arg("rate"),
274 py::arg("poisson"))
275 .def<void (timing::KerberosDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
276 &timing::KerberosDesign::enable_periodic_fl_cmd,
277 py::arg("command"),
278 py::arg("channel"),
279 py::arg("rate"),
280 py::arg("poisson"))
281 .def("apply_endpoint_delay",
282 &timing::KerberosDesign::apply_endpoint_delay,
283 py::arg("address"),
284 py::arg("coarse_delay"),
285 py::arg("fine_delay"),
286 py::arg("phase_delay"),
287 py::arg("measure_rtt") = false,
288 py::arg("control_sfp") = true,
289 py::arg("sfp_mux") = -1)
290 .def("measure_endpoint_rtt",
291 &timing::KerberosDesign::measure_endpoint_rtt,
292 py::arg("address"),
293 py::arg("control_sfp") = true,
294 py::arg("sfp_mux") = -1)
295 .def("switch_mux", &timing::KerberosDesign::switch_mux, py::arg("mux"), py::arg("resync_cdr") = false)
296 .def("read_active_mux", &timing::KerberosDesign::read_active_mux)
297 .def("configure", &timing::KerberosDesign::configure, py::arg("clock_source"), py::arg("ts_source"))
298 ;
299
300 // Gaia
301 py::class_<timing::GaiaDesign, uhal::Node>(m, "GaiaDesign")
302 .def("read_firmware_version", &timing::GaiaDesign::read_firmware_version)
303 .def("validate_firmware_version", &timing::GaiaDesign::validate_firmware_version)
304 .def("sync_timestamp", &timing::GaiaDesign::sync_timestamp)
305 .def<void (timing::GaiaDesign::*)(uint32_t, double, bool) const>("enable_periodic_fl_cmd",
306 &timing::GaiaDesign::enable_periodic_fl_cmd,
307 py::arg("channel"),
308 py::arg("rate"),
309 py::arg("poisson"))
310 .def<void (timing::GaiaDesign::*)(uint32_t, uint32_t, double, bool) const>("enable_periodic_fl_cmd",
311 &timing::GaiaDesign::enable_periodic_fl_cmd,
312 py::arg("command"),
313 py::arg("channel"),
314 py::arg("rate"),
315 py::arg("poisson"))
316 .def("apply_endpoint_delay",
317 &timing::GaiaDesign::apply_endpoint_delay,
318 py::arg("address"),
319 py::arg("coarse_delay"),
320 py::arg("fine_delay"),
321 py::arg("phase_delay"),
322 py::arg("measure_rtt") = false,
323 py::arg("control_sfp") = true,
324 py::arg("sfp_mux") = -1)
325 .def("measure_endpoint_rtt",
326 &timing::GaiaDesign::measure_endpoint_rtt,
327 py::arg("address"),
328 py::arg("control_sfp") = true,
329 py::arg("sfp_mux") = -1)
330 .def("switch_mux", &timing::GaiaDesign::switch_mux, py::arg("mux"), py::arg("resync_cdr") = false)
331 .def("read_active_mux", &timing::GaiaDesign::read_active_mux)
332 .def<void (timing::GaiaDesign::*)(ClockSource, TimestampSource, IRIGEpoch) const>("configure", &timing::GaiaDesign::configure, py::arg("clock_source"), py::arg("ts_source"), py::arg("epoch"))
333 ;
334} // NOLINT
dunedaq::timing::BoreasDesign
Class for timing master with integrated HSI designs.
Definition BoreasDesign.hpp:35
dunedaq::timing::GaiaDesign
Class for timing fanout designs.
Definition GaiaDesign.hpp:37
dunedaq::timing::KerberosDesign
Class for timing fanout designs.
Definition KerberosDesign.hpp:38
dunedaq::timing::MasterDesign
Base class for timing master designs.
Definition MasterDesign.hpp:34
dunedaq::timing::MasterMuxDesign
Class for PDI timing master design on mux board.
Definition MasterMuxDesign.hpp:36
dunedaq::timing::OuroborosDesign
Class for PDI timing master design (known as overlord).
Definition OuroborosDesign.hpp:35
dunedaq::timing::OuroborosMuxDesign
Class for PDI ouroboros timing master design.
Definition OuroborosMuxDesign.hpp:35

◆ swap_commands_map()

std::map< std::string, FixedLengthCommandType > dunedaq::timing::python::swap_commands_map ( const std::map< FixedLengthCommandType, std::string > & command_map)

Definition at line 28 of file definitions.cpp.

29{
30 std::map<std::string, FixedLengthCommandType> swapped_map;
31 for (auto& cmd: command_map) {
32 swapped_map.emplace( std::pair<std::string,FixedLengthCommandType>(cmd.second, cmd.first) );
33 }
34 return swapped_map;
35}
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