12#ifndef TIMING_INCLUDE_TIMING_HSIDESIGNINTERFACE_HPP_
13#define TIMING_INCLUDE_TIMING_HSIDESIGNINTERFACE_HPP_
24#include "uhal/DerivedNode.hpp"
54 auto top_level_hsi_nodes = getNodes(
"hsi");
55 if (top_level_hsi_nodes.size() > 0)
57 return uhal::Node::getNode<HSINode>(
"hsi");
61 return uhal::Node::getNode<HSINode>(
"endpoint0.hsi");
74 bool dispatch =
true)
const
Base class for timing endpoint design nodes.
virtual void get_info(uint32_t ept_id, timingendpointinfo::TimingEndpointInfo &mon_data) const
Give info to collector.
Base class for timing hsi design nodes.
virtual ~HSIDesignInterface()
virtual void get_info(timingfirmwareinfo::HSIFirmwareMonitorData &mon_data) const
Give info to collector.
HSIDesignInterface(const uhal::Node &node)
virtual void configure_hsi(uint32_t src, uint32_t re_mask, uint32_t fe_mask, uint32_t inv_mask, double rate, bool dispatch=true) const
Configure the HSI node.
void get_info(timingfirmwareinfo::TimingDeviceInfo &mon_data) const override
Give info to collector.
virtual const HSINode & get_hsi_node() const
Get the HSI node.
void get_info(timingfirmwareinfo::HSIFirmwareMonitorData &mon_data) const
Collect monitoring information for timing endpoint.
void configure_hsi(uint32_t src, uint32_t re_mask, uint32_t fe_mask, uint32_t inv_mask, double rate, uint32_t clock_frequency_hz, bool dispatch=true) const
Configure HSI triggering.
virtual uint32_t read_firmware_frequency() const
Read the word identifying the frequency [units of Hz] of the firmware in the FPGA.
virtual const IONode * get_io_node_plain() const =0
Get io node pointer.
virtual void get_info(timingfirmwareinfo::TimingDeviceInfo &mon_data) const =0
Give info to collector.
HSIFirmwareMonitorData hsi_info
timingendpointinfo::TimingEndpointInfo endpoint_info