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DUNE Trigger and Data Acquisition software
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Public Member Functions | Private Attributes | List of all members
ADC_ASIC_reg_mapping Class Reference

#include <ADC_ASIC_reg_mapping.hh>

Public Member Functions

 ADC_ASIC_reg_mapping ()
void set_ch (uint8_t chip=0, uint8_t chn=0, uint8_t d=0, uint8_t pcsr=0, uint8_t pdsr=0, uint8_t slp=0, uint8_t tstin=0)
void set_global (uint8_t chip, uint8_t f4=0, uint8_t f5=0, uint8_t slsb=0, uint8_t res4=0, uint8_t res3=0, uint8_t res2=0, uint8_t res1=0, uint8_t res0=0, uint8_t clk0=0, uint8_t clk1=0, uint8_t frqc=0, uint8_t engr=0, uint8_t f0=0, uint8_t f1=0, uint8_t f2=0, uint8_t f3=0)
void set_chip (uint8_t chip=0, uint8_t d=0, uint8_t pcsr=0, uint8_t pdsr=0, uint8_t slp=0, uint8_t tstin=0, uint8_t f4=0, uint8_t f5=0, uint8_t slsb=0, uint8_t res4=0, uint8_t res3=0, uint8_t res2=0, uint8_t res1=0, uint8_t res0=0, uint8_t clk0=0, uint8_t clk1=0, uint8_t frqc=0, uint8_t engr=0, uint8_t f0=0, uint8_t f1=0, uint8_t f2=0, uint8_t f3=0)
void set_board (uint8_t d=0, uint8_t pcsr=0, uint8_t pdsr=0, uint8_t slp=0, uint8_t tstin=0, uint8_t f4=0, uint8_t f5=0, uint8_t slsb=0, uint8_t res4=0, uint8_t res3=0, uint8_t res2=0, uint8_t res1=0, uint8_t res0=0, uint8_t clk0=0, uint8_t clk1=0, uint8_t frqc=0, uint8_t engr=0, uint8_t f0=0, uint8_t f1=0, uint8_t f2=0, uint8_t f3=0)
std::bitset< 1152 > get_bits () const
void print () const

Private Attributes

std::bitset< 1152 > BITS

Detailed Description

Definition at line 7 of file ADC_ASIC_reg_mapping.hh.

Constructor & Destructor Documentation

◆ ADC_ASIC_reg_mapping()

ADC_ASIC_reg_mapping::ADC_ASIC_reg_mapping ( )

Definition at line 4 of file ADC_ASIC_reg_mapping.cpp.

5 : BITS()
6{
7}
ADC_ASIC_reg_mapping::BITS
std::bitset< 1152 > BITS
Definition ADC_ASIC_reg_mapping.hh:36

Member Function Documentation

◆ get_bits()

std::bitset< 1152 > ADC_ASIC_reg_mapping::get_bits ( ) const

Definition at line 158 of file ADC_ASIC_reg_mapping.cpp.

159{
160 return BITS;
161}

◆ print()

void ADC_ASIC_reg_mapping::print ( ) const

Definition at line 164 of file ADC_ASIC_reg_mapping.cpp.

165{
166 std::cout << "ADC_ASIC_reg_mapping (binary):" << std::endl;
167 std::string bitString = BITS.to_string<char, std::string::traits_type, std::string::allocator_type>();
168 for (size_t iLine = 0; iLine < 36; iLine++) {
169 for (size_t iByte = 0; iByte < 4; iByte++) {
170 for (size_t iBit = 0; iBit < 8; iBit++) {
171 std::cout << bitString[iLine * 32 + iByte * 8 + iBit];
172 }
173 std::cout << ' ';
174 }
175 std::cout << std::endl;
176 }
177 // std::cout << BITS << std::endl;
178}

◆ set_board()

void ADC_ASIC_reg_mapping::set_board ( uint8_t d = 0,
uint8_t pcsr = 0,
uint8_t pdsr = 0,
uint8_t slp = 0,
uint8_t tstin = 0,
uint8_t f4 = 0,
uint8_t f5 = 0,
uint8_t slsb = 0,
uint8_t res4 = 0,
uint8_t res3 = 0,
uint8_t res2 = 0,
uint8_t res1 = 0,
uint8_t res0 = 0,
uint8_t clk0 = 0,
uint8_t clk1 = 0,
uint8_t frqc = 0,
uint8_t engr = 0,
uint8_t f0 = 0,
uint8_t f1 = 0,
uint8_t f2 = 0,
uint8_t f3 = 0 )

Definition at line 108 of file ADC_ASIC_reg_mapping.cpp.

129{
130
131 for (size_t chip = 0; chip < 8; chip++) {
132 set_chip(chip,
133 d,
134 pcsr,
135 pdsr,
136 slp,
137 tstin,
138 f4,
139 f5,
140 slsb,
141 res4,
142 res3,
143 res2,
144 res1,
145 res0,
146 clk0,
147 clk1,
148 frqc,
149 engr,
150 f0,
151 f1,
152 f2,
153 f3);
154 }
155}
ADC_ASIC_reg_mapping::set_chip
void set_chip(uint8_t chip=0, uint8_t d=0, uint8_t pcsr=0, uint8_t pdsr=0, uint8_t slp=0, uint8_t tstin=0, uint8_t f4=0, uint8_t f5=0, uint8_t slsb=0, uint8_t res4=0, uint8_t res3=0, uint8_t res2=0, uint8_t res1=0, uint8_t res0=0, uint8_t clk0=0, uint8_t clk1=0, uint8_t frqc=0, uint8_t engr=0, uint8_t f0=0, uint8_t f1=0, uint8_t f2=0, uint8_t f3=0)
Definition ADC_ASIC_reg_mapping.cpp:77

◆ set_ch()

void ADC_ASIC_reg_mapping::set_ch ( uint8_t chip = 0,
uint8_t chn = 0,
uint8_t d = 0,
uint8_t pcsr = 0,
uint8_t pdsr = 0,
uint8_t slp = 0,
uint8_t tstin = 0 )

Definition at line 10 of file ADC_ASIC_reg_mapping.cpp.

17{
18 uint8_t tmp_d = ((d << 4) & 0xF0);
19 uint8_t tmp_d0 = (tmp_d & 0x80) >> 3;
20 uint8_t tmp_d1 = (tmp_d & 0x40) >> 1;
21 uint8_t tmp_d2 = (tmp_d & 0x20) << 1;
22 uint8_t tmp_d3 = (tmp_d & 0x10) << 3;
23 tmp_d = tmp_d0 + tmp_d1 + tmp_d2 + tmp_d3;
24
25 unsigned long chn_reg =
26 (tmp_d & 0xF0) + ((pcsr & 0x01) << 3) + ((pdsr & 0x01) << 2) + ((slp & 0x01) << 1) + ((tstin & 0x01) << 0);
27
28 std::bitset<8> bits(chn_reg);
29 size_t start_pos = (8 * 16 + 16) * chip + (16 - chn) * 8;
30 for (size_t iBit = 0; iBit < 8; iBit++) {
31 BITS[iBit + start_pos - 8] = bits[iBit];
32 }
33}
hermesmodules.rx_endpoints.d
d
Definition rx_endpoints.py:6

◆ set_chip()

void ADC_ASIC_reg_mapping::set_chip ( uint8_t chip = 0,
uint8_t d = 0,
uint8_t pcsr = 0,
uint8_t pdsr = 0,
uint8_t slp = 0,
uint8_t tstin = 0,
uint8_t f4 = 0,
uint8_t f5 = 0,
uint8_t slsb = 0,
uint8_t res4 = 0,
uint8_t res3 = 0,
uint8_t res2 = 0,
uint8_t res1 = 0,
uint8_t res0 = 0,
uint8_t clk0 = 0,
uint8_t clk1 = 0,
uint8_t frqc = 0,
uint8_t engr = 0,
uint8_t f0 = 0,
uint8_t f1 = 0,
uint8_t f2 = 0,
uint8_t f3 = 0 )

Definition at line 77 of file ADC_ASIC_reg_mapping.cpp.

99{
100 for (size_t chn = 0; chn < 16; chn++) {
101 set_ch(chip, chn, d, pcsr, pdsr, slp, tstin);
102 }
103
104 set_global(chip, f4, f5, slsb, res4, res3, res2, res1, res0, clk0, clk1, frqc, engr, f0, f1, f2, f3);
105}
ADC_ASIC_reg_mapping::set_global
void set_global(uint8_t chip, uint8_t f4=0, uint8_t f5=0, uint8_t slsb=0, uint8_t res4=0, uint8_t res3=0, uint8_t res2=0, uint8_t res1=0, uint8_t res0=0, uint8_t clk0=0, uint8_t clk1=0, uint8_t frqc=0, uint8_t engr=0, uint8_t f0=0, uint8_t f1=0, uint8_t f2=0, uint8_t f3=0)
Definition ADC_ASIC_reg_mapping.cpp:35
ADC_ASIC_reg_mapping::set_ch
void set_ch(uint8_t chip=0, uint8_t chn=0, uint8_t d=0, uint8_t pcsr=0, uint8_t pdsr=0, uint8_t slp=0, uint8_t tstin=0)
Definition ADC_ASIC_reg_mapping.cpp:10

◆ set_global()

void ADC_ASIC_reg_mapping::set_global ( uint8_t chip,
uint8_t f4 = 0,
uint8_t f5 = 0,
uint8_t slsb = 0,
uint8_t res4 = 0,
uint8_t res3 = 0,
uint8_t res2 = 0,
uint8_t res1 = 0,
uint8_t res0 = 0,
uint8_t clk0 = 0,
uint8_t clk1 = 0,
uint8_t frqc = 0,
uint8_t engr = 0,
uint8_t f0 = 0,
uint8_t f1 = 0,
uint8_t f2 = 0,
uint8_t f3 = 0 )

Definition at line 35 of file ADC_ASIC_reg_mapping.cpp.

52{
53 std::bitset<16> bits;
54 bits[0] = res0 & 0x1;
55 bits[1] = res1 & 0x1;
56 bits[2] = res2 & 0x1;
57 bits[3] = res3 & 0x1;
58 bits[4] = res4 & 0x1;
59 bits[5] = slsb & 0x1;
60 bits[6] = f5 & 0x1;
61 bits[7] = f4 & 0x1;
62 bits[8] = f3 & 0x1;
63 bits[9] = f2 & 0x1;
64 bits[10] = f1 & 0x1;
65 bits[11] = f0 & 0x1;
66 bits[12] = engr & 0x1;
67 bits[13] = frqc & 0x1;
68 bits[14] = clk1 & 0x1;
69 bits[15] = clk0 & 0x1;
70
71 size_t start_pos = (8 * 16 + 16) * chip + 16 * 8;
72 for (size_t iBit = 0; iBit < 16; iBit++) {
73 BITS[iBit + start_pos] = bits[iBit];
74 }
75}

Member Data Documentation

◆ BITS

std::bitset<1152> ADC_ASIC_reg_mapping::BITS
private

Definition at line 36 of file ADC_ASIC_reg_mapping.hh.

The documentation for this class was generated from the following files:
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