LCOV - code coverage report
Current view: top level - wibmod/src/WIB1 - FE_ASIC_reg_mapping.cpp (source / functions) Coverage Total Hit
Test: code.result Lines: 0.0 % 56 0
Test Date: 2025-12-21 13:07:08 Functions: 0.0 % 8 0

            Line data    Source code
       1              : #include "wibmod/WIB1/FE_ASIC_reg_mapping.hh"
       2              : #include <iostream>
       3              : 
       4            0 : FE_ASIC_reg_mapping::FE_ASIC_reg_mapping(): BITS()
       5              : {
       6            0 : }
       7              : 
       8            0 : void FE_ASIC_reg_mapping::set_ch(uint8_t chip, uint8_t chn, uint8_t sts, uint8_t snc, 
       9              :            uint8_t sg, uint8_t st, uint8_t smn, uint8_t sdf)
      10              : {
      11            0 :   unsigned long chn_reg = ((sts&0x01)<<7) + ((snc&0x01)<<6) + ((sg&0x03)<<4) 
      12            0 :                     + ((st&0x03)<<2)  + ((smn&0x01)<<1) + ((sdf&0x01)<<0);
      13            0 :   std::bitset<8> bits(chn_reg);
      14            0 :   size_t start_pos = (8*16+16)*chip + (16-chn)*8;
      15            0 :   for(size_t iBit=0; iBit < 8; iBit++)
      16              :   {
      17            0 :     BITS[iBit+start_pos-8] = bits[iBit];
      18              :   }
      19            0 : }
      20            0 : void FE_ASIC_reg_mapping::set_global(uint8_t chip, uint8_t slk0, uint8_t stb1,
      21              :            uint8_t stb, uint8_t s16, uint8_t slk1, 
      22              :            uint8_t sdc, uint8_t swdac, uint8_t dac)
      23              : {
      24            0 :   unsigned long global_reg = ((slk0&0x01)<<0) + ((stb1&0x01)<<1) + ((stb&0x01)<<2) 
      25            0 :                + ((s16&0x01)<<3) + ((slk1&0x01)<<4) + ((sdc&0x01)<<5) +((0&0x03)<<6);
      26              : 
      27            0 :   unsigned long dac_reg = (((dac&0x01)/0x01)<<7)+(((dac&0x02)/0x02)<<6)
      28            0 :             +(((dac&0x04)/0x04)<<5)+(((dac&0x08)/0x08)<<4)
      29            0 :             +(((dac&0x10)/0x10)<<3)+(((dac&0x20)/0x20)<<2)
      30            0 :             +(((swdac&0x03))<<0);
      31              : 
      32            0 :   std::bitset<8> global_bits(global_reg);
      33            0 :   std::bitset<8> dac_bits(dac_reg);
      34              : 
      35            0 :   std::bitset<16> bits;
      36            0 :   for(size_t iBit=0; iBit < 8; iBit++)
      37              :   {
      38            0 :     bits[iBit] = global_bits[iBit];
      39            0 :     bits[iBit+8] = dac_bits[iBit];
      40              :   }
      41              : 
      42            0 :   size_t start_pos = (8*16+16)*chip + 16*8;
      43            0 :   for(size_t iBit=0; iBit < 16; iBit++)
      44              :   {
      45            0 :     BITS[iBit+start_pos] = bits[iBit];
      46              :   }
      47            0 : }
      48              : 
      49            0 : void FE_ASIC_reg_mapping::set_chip(uint8_t chip, 
      50              :          uint8_t sts, uint8_t snc, uint8_t sg, uint8_t st, 
      51              :          uint8_t smn, uint8_t sdf, uint8_t slk0, 
      52              :          uint8_t stb1, uint8_t stb, uint8_t s16, 
      53              :          uint8_t slk1, uint8_t sdc, uint8_t swdac, uint8_t dac)
      54              : {
      55            0 :   for (size_t chn=0; chn<16; chn++)
      56              :   {
      57            0 :       set_ch(chip, chn, sts, snc, sg, st, smn, sdf);
      58              :   }
      59            0 :   set_global (chip, slk0, stb1, stb, s16, slk1, sdc, swdac, dac);
      60            0 : }
      61              : 
      62            0 : void FE_ASIC_reg_mapping::set_board(uint8_t sts, uint8_t snc, uint8_t sg, uint8_t st, 
      63              :          uint8_t smn, uint8_t sdf, uint8_t slk0, 
      64              :          uint8_t stb1, uint8_t stb, uint8_t s16, 
      65              :          uint8_t slk1, uint8_t sdc, uint8_t swdac, uint8_t dac)
      66              : {
      67            0 :   for (size_t chip=0; chip<8; chip++)
      68              :   {
      69            0 :      set_chip( chip, sts, snc, sg, st, smn, sdf, slk0, stb1, stb, s16, slk1, sdc, swdac, dac);
      70              :   }
      71            0 : }
      72              : 
      73            0 : std::bitset<1152> FE_ASIC_reg_mapping::get_bits() const
      74              : {
      75            0 :   return BITS;
      76              : }
      77              : 
      78              : 
      79            0 : void FE_ASIC_reg_mapping::set_collection_baseline(uint8_t snc)
      80              : {
      81            0 :   for (size_t chip=0; chip<8; chip++)
      82              :   {
      83            0 :     for (size_t chn=0; chn<16; chn++)
      84              :     {
      85            0 :       bool isCollection = (channel_wire_plane[chip][chn] == 2);
      86            0 :       size_t start_pos = (8*16+16)*chip + (16-chn)*8;
      87            0 :       if (isCollection)
      88              :       {
      89            0 :         BITS[6+start_pos-8] = snc & 0x1;
      90              :       }
      91              :     }
      92              :   }
      93            0 : }
      94              : 
      95            0 : void FE_ASIC_reg_mapping::print() const
      96              : {
      97            0 :   std::cout << "FE_ASIC_reg_mapping (binary):" << std::endl;
      98            0 :   std::string bitString = BITS.to_string<char,std::string::traits_type,std::string::allocator_type>();
      99            0 :   for(size_t iLine=0; iLine < 36; iLine++)
     100              :   {
     101            0 :     for(size_t iByte=0; iByte < 4; iByte++)
     102              :     {
     103            0 :       for(size_t iBit=0; iBit < 8; iBit++)
     104              :       {
     105            0 :         std::cout << bitString[iLine*32+iByte*8+iBit];
     106              :       }
     107            0 :       std::cout << ' ';
     108              :     }
     109            0 :     std::cout << std::endl;
     110              :   }
     111              :   //std::cout << BITS << std::endl;
     112            0 : }
     113              : 
     114              : // wire plane [asic 0-7][channel 0-15] 
     115              : // U=0, V=1, W/X/Z/collection=2; increasing in direction electrons drift as larsoft does
     116              : const uint8_t FE_ASIC_reg_mapping::channel_wire_plane[8][16] = {
     117              :   {0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2},
     118              :   {0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2},
     119              :   {2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0},
     120              :   {2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0},
     121              :   {0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2},
     122              :   {0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2},
     123              :   {2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0},
     124              :   {2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0}
     125              : };
        

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