Line data Source code
1 : /**
2 : * @file AVXRunSumProcessor.cpp
3 : *
4 : * @copyright This is part of the DUNE DAQ Software Suite, copyright 2020.
5 : * Licensing/copyright details are in the COPYING file that you should have
6 : * received with this code.
7 : */
8 :
9 : #include "tpglibs/AVXRunSumProcessor.hpp"
10 :
11 : namespace tpglibs {
12 :
13 15 : REGISTER_AVXPROCESSOR_CREATOR("AVXRunSumProcessor", AVXRunSumProcessor)
14 :
15 : void
16 5 : AVXRunSumProcessor::configure(const nlohmann::json& config, const int16_t* plane_numbers)
17 : {
18 : #ifdef TPGLIBS_ENABLE_STATE_MONITORING
19 : m_internal_state_name_registry.register_internal_state("r", std::shared_ptr<__m256i>(&m_memory_factor, [](auto*) {}));
20 : m_internal_state_name_registry.register_internal_state("s", std::shared_ptr<__m256i>(&m_scale_factor, [](auto*) {}));
21 : m_internal_state_name_registry.register_internal_state("rs", std::shared_ptr<__m256i>(&m_running_sum, [](auto*) {}));
22 : configure_internal_state_collection(config);
23 : #endif
24 :
25 5 : int16_t memory_factors[16];
26 5 : int16_t plane_memory_factors[3] = { config["memory_factor_plane0"],
27 5 : config["memory_factor_plane1"],
28 5 : config["memory_factor_plane2"] };
29 5 : int16_t memory_divisors[16];
30 5 : int16_t plane_memory_divisors[3] = { config["memory_divisor_plane0"],
31 5 : config["memory_divisor_plane1"],
32 5 : config["memory_divisor_plane2"] };
33 5 : int16_t scale_factors[16];
34 5 : int16_t plane_scale_factors[3] = { config["scale_factor_plane0"],
35 5 : config["scale_factor_plane1"],
36 5 : config["scale_factor_plane2"] };
37 5 : int16_t scale_divisors[16];
38 5 : int16_t plane_scale_divisors[3] = { config["scale_divisor_plane0"],
39 5 : config["scale_divisor_plane1"],
40 5 : config["scale_divisor_plane2"] };
41 :
42 85 : for (int i = 0; i < 16; i++) {
43 80 : memory_factors[i] = plane_memory_factors[plane_numbers[i]];
44 80 : memory_divisors[i] = 0x7FFF / plane_memory_divisors[plane_numbers[i]]; // Need to adjust for AVX2 usage.
45 80 : scale_factors[i] = plane_scale_factors[plane_numbers[i]];
46 80 : scale_divisors[i] = 0x7FFF / plane_scale_divisors[plane_numbers[i]]; // Need to adjust for AVX2 usage.
47 : }
48 :
49 5 : m_memory_factor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(memory_factors));
50 5 : m_memory_divisor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(memory_divisors));
51 5 : m_scale_factor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(scale_factors));
52 5 : m_scale_divisor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(scale_divisors));
53 5 : }
54 :
55 : __m256i
56 24 : AVXRunSumProcessor::process(const __m256i& signal)
57 : {
58 : #ifdef TPGLIBS_ENABLE_STATE_MONITORING
59 : m_samples++;
60 : if (m_collect_internal_state_flag && (m_samples % m_sample_period == 0)) {
61 : m_internal_state_buffer_manager.write_to_active_buffer();
62 : }
63 : #endif
64 :
65 24 : __m256i scaled_rs = _mm256_mulhrs_epi16(m_running_sum, m_memory_divisor);
66 24 : scaled_rs = _mm256_mullo_epi16(scaled_rs, m_memory_factor);
67 :
68 24 : __m256i scaled_signal = _mm256_mulhrs_epi16(signal, m_scale_divisor);
69 24 : scaled_signal = _mm256_mullo_epi16(scaled_signal, m_scale_factor);
70 :
71 24 : m_running_sum = _mm256_adds_epi16(scaled_rs, scaled_signal);
72 24 : return AVXProcessor::process(m_running_sum);
73 : }
74 :
75 : } // namespace tpglibs
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