Line data Source code
1 : /**
2 : * @file AVXRunSumProcessor.cpp
3 : *
4 : * @copyright This is part of the DUNE DAQ Software Suite, copyright 2020.
5 : * Licensing/copyright details are in the COPYING file that you should have
6 : * received with this code.
7 : */
8 :
9 : #include "tpglibs/AVXRunSumProcessor.hpp"
10 :
11 : namespace tpglibs {
12 :
13 12 : REGISTER_AVXPROCESSOR_CREATOR("AVXRunSumProcessor", AVXRunSumProcessor)
14 :
15 5 : void AVXRunSumProcessor::configure(const nlohmann::json& config, const int16_t* plane_numbers) {
16 : #ifdef TPGLIBS_ENABLE_STATE_MONITORING
17 : m_internal_state_name_registry.register_internal_state("r",
18 : std::shared_ptr<__m256i>(&m_memory_factor, [](auto*){}));
19 : m_internal_state_name_registry.register_internal_state("s",
20 : std::shared_ptr<__m256i>(&m_scale_factor, [](auto*){}));
21 : m_internal_state_name_registry.register_internal_state("rs",
22 : std::shared_ptr<__m256i>(&m_running_sum, [](auto*){}));
23 : configure_internal_state_collection(config);
24 : #endif
25 :
26 5 : int16_t memory_factors[16];
27 5 : int16_t plane_memory_factors[3] = {config["memory_factor_plane0"],
28 5 : config["memory_factor_plane1"],
29 5 : config["memory_factor_plane2"]};
30 5 : int16_t memory_divisors[16];
31 5 : int16_t plane_memory_divisors[3] = {config["memory_divisor_plane0"],
32 5 : config["memory_divisor_plane1"],
33 5 : config["memory_divisor_plane2"]};
34 5 : int16_t scale_factors[16];
35 5 : int16_t plane_scale_factors[3] = {config["scale_factor_plane0"],
36 5 : config["scale_factor_plane1"],
37 5 : config["scale_factor_plane2"]};
38 5 : int16_t scale_divisors[16];
39 5 : int16_t plane_scale_divisors[3] = {config["scale_divisor_plane0"],
40 5 : config["scale_divisor_plane1"],
41 5 : config["scale_divisor_plane2"]};
42 :
43 85 : for (int i = 0; i < 16; i++) {
44 80 : memory_factors[i] = plane_memory_factors[plane_numbers[i]];
45 80 : memory_divisors[i] = 0x7FFF / plane_memory_divisors[plane_numbers[i]]; // Need to adjust for AVX2 usage.
46 80 : scale_factors[i] = plane_scale_factors[plane_numbers[i]];
47 80 : scale_divisors[i] = 0x7FFF / plane_scale_divisors[plane_numbers[i]]; // Need to adjust for AVX2 usage.
48 : }
49 :
50 5 : m_memory_factor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(memory_factors));
51 5 : m_memory_divisor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(memory_divisors));
52 5 : m_scale_factor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(scale_factors));
53 5 : m_scale_divisor = _mm256_lddqu_si256(reinterpret_cast<__m256i*>(scale_divisors));
54 5 : }
55 :
56 24 : __m256i AVXRunSumProcessor::process(const __m256i& signal) {
57 : #ifdef TPGLIBS_ENABLE_STATE_MONITORING
58 : m_samples++;
59 : if (m_collect_internal_state_flag && (m_samples % m_sample_period == 0)) {
60 : m_internal_state_buffer_manager.write_to_active_buffer();
61 : }
62 : #endif
63 :
64 24 : __m256i scaled_rs = _mm256_mulhrs_epi16(m_running_sum, m_memory_divisor);
65 24 : scaled_rs = _mm256_mullo_epi16(scaled_rs, m_memory_factor);
66 :
67 24 : __m256i scaled_signal = _mm256_mulhrs_epi16(signal, m_scale_divisor);
68 24 : scaled_signal = _mm256_mullo_epi16(scaled_signal, m_scale_factor);
69 :
70 24 : m_running_sum = _mm256_adds_epi16(scaled_rs, scaled_signal);
71 24 : return AVXProcessor::process(m_running_sum);
72 : }
73 :
74 : } // namespace tpglibs
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